agency-embedded-firmware-engineer

Design production-grade firmware for resource-constrained microcontrollers with RTOS task architecture.

Updated Feb 11, 2026
One-click install
npx skills add https://github.com/augustoheiss/LogicDefense --skill agency-embedded-firmware-engineer-augustoheiss
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Skill: agency-embedded-firmware-engineer
Source: https://github.com/augustoheiss/LogicDefense/tree/main/.gemini/skills/agency-embedded-firmware-engineer
Command: npx skills add https://github.com/augustoheiss/LogicDefense --skill agency-embedded-firmware-engineer-augustoheiss

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

This Skill helps engineers design and implement robust, deterministic firmware for resource-constrained microcontrollers so projects meet timing, memory, and safety requirements in production.

Core Features & Use Cases

  • Reliable driver patterns: Bottom-up peripheral driver design with non-blocking ISRs, error checking, and deterministic transfer patterns for SPI, I2C, UART, CAN, BLE, and Wi‑Fi.
  • RTOS architecture & safety: Task decomposition, priority assignment, stack-size calculation, static allocation patterns, and guidelines to avoid priority inversion and deadlocks with FreeRTOS or Zephyr.
  • Platform best practices & deployment: Platform-specific rules for ESP-IDF, STM32 LL/HAL, Nordic nRF/Zephyr, OTA/bootloader strategies, power modes, and toolchain caveats.
  • Use Case: Turn a prototype ESP32 sensor node into a production device by defining memory budgets, RTOS task design, non-blocking peripheral drivers, power management, and OTA-safe firmware updates.

Quick Start

Review my MCU model, available RAM/flash, peripherals, and intended features and produce a prioritized implementation checklist with per-task stack sizes, synchronization strategy, and platform-specific cautions.

Frequently Asked Questions about agency-embedded-firmware-engineer

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I architect FreeRTOS tasks for an ESP32 sensor node to ensure deterministic memory usage?

Architect FreeRTOS tasks for ESP32 sensor nodes by decomposing functionalities into independent tasks, assigning strict priorities, calculating precise stack sizes, and applying static allocation patterns to ensure deterministic memory usage and avoid deadlocks.

What is the best way to design non-blocking peripheral drivers for STM32 projects?

Design non-blocking STM32 peripheral drivers using a bottom-up approach with LL/HAL APIs, ensuring minimal ISR workload, implementing deterministic transfer patterns, and adding comprehensive error checking for SPI, I2C, and UART communications.

Does this firmware design approach support OTA bootloader safety for Nordic nRF and Zephyr projects?

Yes, this firmware design approach supports OTA bootloader safety for Nordic nRF and Zephyr projects by implementing platform-specific deployment strategies, configuring power modes, and addressing toolchain caveats to guarantee secure over-the-air updates.

How do I calculate RTOS stack sizes and prevent priority inversion in constrained microcontrollers?

Calculate RTOS stack sizes and prevent priority inversion in constrained microcontrollers by applying RTOS architecture safety guidelines, utilizing static allocation patterns, performing precise stack measurements, and implementing synchronization strategies to avoid deadlocks.

What are the limitations of using standard HAL APIs instead of LL drivers for production-grade STM32 firmware?

Standard HAL APIs introduce overhead that challenges production-grade STM32 firmware constraints, whereas LL drivers provide lower-level control necessary for achieving deterministic timing, performing minimal ISR work, and maintaining strict memory budgets in resource-constrained microcontrollers.