Develop AscendC operators for AI chips following official standards.
npx skills add https://github.com/dongg622/china-ai-chip-skill --skill ascendc-dongg622
Please help me install this Agent Skill. Skill: ascendc Source: https://github.com/dongg622/china-ai-chip-skill/tree/main/Ascend/ascendc Command: npx skills add https://github.com/dongg622/china-ai-chip-skill --skill ascendc-dongg622
This Skill streamlines the development and modification of AscendC operators, facilitating efficient and standardized AI chip integration.
Use the ascendc skill to develop a new custom operator by following the official guidelines and utilizing provided reference templates.
High-intent search queries and answers about installing and using this skill.
To develop custom AscendC operators, you implement op_host and op_kernel components following CANN documentation standards. This process involves operator design, kernel implementation, and tiling configuration to ensure standardized AI chip integration.
Tiling configuration in AscendC operator development is the process of partitioning data to optimize kernel execution on AI chips. It is a required step when updating shape inference and designing operators to align with official CANN standards.
Yes, you can add a new GMM operator in CANN by following step-by-step instructions for operator standardization. This workflow integrates existing templates to ensure compliance with AI chip development standards and generates inference examples.
Yes, understanding CANN documentation and existing operator templates is required before writing kernel code. This ensures your AscendC operator design and implementation adhere to official standards for AI chip integration.
The best way to generate inference examples for custom operators is through workflow automation aligned with official CANN documentation. This ensures your kernel implementation and tiling updates meet the required development standards.
mindspore-aiAnalyze vLLM-Ascend operator graphs to identify fusion opportunities and define fused-operator interfaces.
AscendGenerate AscendC operator host/kernel code from design docs and integrate into PyTorch.
AscendGenerate op_host, op_kernel, and test_aclnn scaffolds from CATLASS design documents.
hw-native-sysDesign Ascend C tiling strategies with multi-core and UB buffer planning templates.
