What problem does it solve?
This skill helps EDA researchers move from single-design intuition to reproducible, multi-design evidence for backside net cost models by planning internet-backed benchmarks, constructing signal and clock model tracks, and running standardized evaluations versus HPWL baselines.
Core Features & Use Cases
- Benchmark selection: Guided, primary-source web research and a minimum multi-family benchmark set (systolic arrays, Rocket Chip, Gemmini) with pinned commits for reproducibility.
- Model planning: Dual-track model plans for signal and clock nets with aligned output fields (cost_front, cost_back, delta_cost, min_cost) and theory gating via paired rules.
- Evaluation & promotion gates: Contract checks, bucketed Pearson/Spearman/sign panels, stability analyses across designs and seeds, and clear promotion rules to move models into active optimization.
- Artifacts & scripts: Produces contract and bucketed TSV/MD artifacts and leverages provided evaluation scripts for deterministic checks and scorecards.
Quick Start
Use the bscost-net skill to plan and run a multi-design benchmark that compares a backside net cost model against HPWL and produces contract and bucketed scorecards.