What problem does it solve? Designing a CATLASS-based Ascend C operator requires choosing the correct combination of ArchTag, DispatchPolicy, TileShape, BlockMmad, BlockEpilogue, BlockScheduler, and Kernel type from a large template library, where wrong choices cause precision loss, deadlocks, or severe performance regressions. ## Core Features & Use Cases - Component Selection Methodology: Step-by-step decision trees route operator requirements (matmul, grouped matmul, FlashAttention, linear attention, quant matmul) to the correct DispatchPolicy, Kernel type, TileShape, and BlockScheduler. - Epilogue Slot Analysis: Enforces slot-by-slot verification of BlockEpilogue template parameters, UB budget checks, hardware event ID limits, and cross-N-block operand topology checks for gated activations like SwiGLU. - Design Document Output: Produces structured design tables covering component selection, branch instantiation conditions, workspace estimation, and custom Tile contracts. - Use Case: When implementing a fused matmul+GELU operator for Ascend910B, use this Skill to determine that a multi-stage rotating workspace kernel with MmadAtlasA2PreloadAsyncWithCallback outperforms the example-level MatmulActivation path, and to verify L1/L0 capacity constraints for the chosen TileShape. ## Quick Start Ask the assistant to design a CATLASS component selection plan for your target operator, specifying the operator type, input dtypes, layouts, and target Ascend chip.