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catlass-op-develop

Generate CATLASS kernel code for Ascend NPU operators from design selections.

Updated Sep 15, 2026
Search Tags:#flash attention#matmul#catlass#kernel generation#ascend npu#epilogue#precision verification
One-click install
npx skills add https://github.com/WangWindow/CANN-BatchMatMulMaxsum --skill catlass-op-develop-wangwindow
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: catlass-op-develop
Source: https://github.com/WangWindow/CANN-BatchMatMulMaxsum/tree/main/.agents/skills/catlass-op-develop
Command: npx skills add https://github.com/WangWindow/CANN-BatchMatMulMaxsum --skill catlass-op-develop-wangwindow

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve? Implementing high-performance operators on Ascend NPUs with the CATLASS template library requires correctly assembling BlockMmad, BlockEpilogue, BlockScheduler, and Kernel components, constructing Kernel::Params, and writing Device-side calls—mistakes in any step cause compilation failures, workspace corruption, or silent precision errors. This Skill turns design selections into correct CATLASS kernel code with enforced rules and verified patterns. ## Core Features & Use Cases - Kernel Assembly Chains: Produces using chains (BlockMmad/BlockEpilogue/BlockScheduler/Kernel), Kernel::Params construction, and Device-side Kernel{}(params) calls for basic matmul, matmul with epilogue, bias+activation, and quantized matmul (AIC/AIV coordination). - Custom Tile Epilogue: Generates custom Tile Epilogue header files aligned to target slot signatures using only AscendC vector APIs. - Attention Operator Recipes: Provides step-by-step handcraft recipes for FlashAttention variants (paged, causal, varlen, sink, MLA, SageAttention) and linear attention (GDN/KDA/retention) with stage design, workspace, and CrossCoreFlag protocols. - Precision Verification: Enforces a mandatory verify_result.py template with dual MERE/MARE and atol/rtol/error_ratio criteria aligned to the ops-precision-standard. - Use Case: Given a DESIGN.md selecting MmadAtlasA2Pingpong with a GELU epilogue, generate the complete op_kernel using chain, Params construction, and Device call, plus gen_data/golden/verify scripts covering real-network shapes. ## Quick Start Ask the assistant to implement the CATLASS op_kernel for your operator based on the design document's component selections, after reading the workspace catlass README, docs, and reference example.

Frequently Asked Questions about catlass-op-develop

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I generate a CATLASS kernel from design selections?▼

Assemble a using chain of ArchTag, DispatchPolicy, L1/L0 TileShapes, GemmTypes, BlockMmad, BlockEpilogue (or void), and BlockScheduler into a Kernel type. Then construct Kernel::Params with the problem shape, layouts, and workspace pointer, and invoke Kernel{}(params) on the Device side.

What must I read before implementing a CATLASS operator?▼

Before writing any code you must read the workspace ./catlass/README.md for library positioning and structure, ./catlass/docs/ for assembly knowledge and constraints, and the design-specified reference sample under ./catlass/examples/ including its in-directory documentation. Entering implementation without this reading is forbidden.

Why does GetUserWorkspace cause MTE DDR out-of-bounds in CATLASS kernels?▼

In catlass hand-launch direct calls, GetUserWorkspace discards its argument and returns an uninitialized kfc address plus offset, causing MTE DDR violation (error 507057). Use pointer pass-through instead: GM_ADDR userWs = workspace; GetUserWorkspace is only valid on aclnn/framework launch paths.

Can I use DeviceGemm adapter inside op_kernel?▼

No. DeviceGemm is a host-side adapter that wraps workspace allocation and stream scheduling, which the op_host and CANN framework already manage. Inside op_kernel you must use only the Device call form Kernel{}(params) with manually constructed Params.

How should precision verification be written for CATLASS operators?▼

Copy the mandatory verify_result_template.py and modify only the marked region for output shape and dtype. Verification runs dual criteria—MERE/MARE thresholds and atol/rtol/error_ratio—passing if either succeeds, and golden must mirror the kernel's numeric path with fp32 accumulation.

What are the limitations of fixed COMPUTE_LENGTH tile epilogues?▼

Tile epilogues with fixed COMPUTE_LENGTH can cause AIV UB overflow when combined with very small M/N dimensions or tail blocks. Test shapes should be integer multiples of the L1 tile M/N, and cross-N-block gating epilogues like SwiGLU require scheduling by output shape [M, H].

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