critic

Review engineering deliverables for policy compliance and cross-domain inconsistencies.

Updated Jun 8, 2026
One-click install
npx skills add https://github.com/Qiuu2/algo --skill critic-qiuu2
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: critic
Source: https://github.com/Qiuu2/algo/tree/main/.claude/skills/critic
Command: npx skills add https://github.com/Qiuu2/algo --skill critic-qiuu2

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

Engineering deliverables for DSP, acoustic, hardware, structural, and test domains often contain unsubstantiated claims, policy compliance violations, or cross-domain inconsistencies that slip through standard review processes, leading to irreversible mistakes, costly rework, or failed stakeholder approvals.

Core Features & Use Cases

  • Policy-Enforced Provenance Checks: Automatically enforces POLICY-PROV-001 v1.7 gates C1-C10, L-grade completeness standards, and irreversible action rules to prevent unverified data from being locked into irreversible decisions.
  • Domain-Specific Error Scanning: Detects common error patterns across acoustics, DSP, hardware, structural, and test domains, including fixed-point overflow risks, unverified mesh convergence, and missing thermal design validation.
  • Cross-Domain Consistency Verification: Validates alignment between interconnected subsystems (e.g., acoustics cavity volume matches structural internal dimensions, DSP MIPS requirements fit processor capabilities) to prevent integration failures.
  • Use Case: Use this skill to review a new hardware prototype bringup guide before it is shared with the CTO, to catch unsafe JTAG connection sequences, missing ERC/DRC waivers, and unverified component derating.

Quick Start

Use the critic skill to perform a full adversarial review of the attached DSP filter design document and flag any compliance violations or unsubstantiated claims before it is submitted to the engineering lead.

Frequently Asked Questions about critic

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I enforce engineering compliance and provenance verification before stakeholder approval?

To enforce engineering compliance, perform adversarial review of deliverables using provenance gates C1-C10 and L-grade completeness requirements. This identifies critical flaws and policy violations before stakeholder approval, ensuring all claims are substantiated.

What is adversarial review for engineering deliverables and when do I need it?

Adversarial review is a policy-compliant scanning process for engineering deliverables that detects unsubstantiated claims and cross-domain inconsistencies. You need it when finalizing DSP algorithms, acoustic designs, or hardware schematics to prevent costly rework and irreversible mistakes.

How do I verify cross-domain consistency between DSP, acoustic, and hardware subsystems?

Verify cross-domain consistency by applying interface checks that validate alignment between interconnected subsystems, such as matching acoustic cavity volumes with structural internal dimensions, and ensuring DSP MIPS requirements fit processor capabilities to prevent integration failures.

Can I detect fixed-point overflow risks and missing thermal design validation in hardware schematics?

Yes, you can detect fixed-point overflow risks and missing thermal design validation through domain-specific error scanning. This process automatically identifies common error patterns across acoustics, DSP, hardware, structural, and test domains during the review.

Does this review process support irreversible action restrictions and auditable reviewer attribution?

Yes, the review process enforces irreversible action restrictions to prevent unverified data from being locked into decisions. All verdicts include auditable reviewer attribution, providing full traceability for compliance tracking per POLICY-PROV-001 v1.7.

What's the best way to review a hardware prototype bringup guide before sharing it with the CTO?

The best way to review a hardware prototype bringup guide is to perform a full adversarial review to catch unsafe JTAG connection sequences, missing ERC/DRC waivers, and unverified component derating before submitting it to the engineering lead or CTO.