cuda-b200

Optimizes and debugs CUDA kernels for NVIDIA B200 using compute-sanitizer, nsys, and ncu.

3|Updated May 14, 2026
One-click install
npx skills add https://github.com/Romaosir/IF_Romao_kernel_optimize --skill cuda-b200
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: cuda-b200
Source: https://github.com/Romaosir/IF_Romao_kernel_optimize/tree/main/skills/b200_skill/cuda-b200-skill
Command: npx skills add https://github.com/Romaosir/IF_Romao_kernel_optimize --skill cuda-b200

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve?

This Skill helps you author, debug, and performance-tune CUDA kernels specifically for NVIDIA B200 (compute capability 10.0) by enforcing a correctness-first, measurement-driven workflow and by separating generic Blackwell targets (sm_100) from architecture-specific ones (sm_100a).

Core Features & Use Cases

  • Correctness-first kernel development using the right debugging loop with compute-sanitizer tools (memcheck, racecheck, synccheck, initcheck) and targeted device-side printf strategies.
  • Blackwell-aware tuning decisions grounded in B200 facts like unified L1/texture/shared memory (256KB per SM), shared-memory carveout options, and cluster portability constraints.
  • Profile-then-optimize performance workflow using nsys for hotspot discovery and ncu for kernel-level diagnosis (occupancy, stalls, coalescing, register pressure, shared-memory bottlenecks, TensorCore usage).
  • Architecture-target selection and compatibility control between generic sm_100 / compute_100 and architecture-specific sm_100a / compute_100a, plus guidance on when PTX inclusion is needed.

Quick Start

Use the cuda-b200 skill to review your CUDA kernel for B200 by checking correctness, then running nsys and ncu to identify the main bottleneck before proposing a single measurable optimization change.

Frequently Asked Questions about cuda-b200

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I optimize CUDA kernels for NVIDIA B200 Blackwell architecture?

To optimize CUDA kernels for NVIDIA B200, enforce a correctness-first workflow using compute-sanitizer, then profile with nsys to discover hotspots and use ncu for kernel-level diagnosis before applying Blackwell-specific tuning constraints like unified L1/texture/shared memory carveouts.

What is the difference between sm_100 and sm_100a compute capabilities in nvcc?

The sm_100 and compute_100 targets represent generic Blackwell behavior, while sm_100a and compute_100a are architecture-specific targets for B200 that enable features not guaranteed across all sm_100 devices, requiring careful compatibility control and PTX inclusion when needed.

How do I debug CUDA kernel correctness issues before performance tuning?

Debug CUDA kernel correctness issues using compute-sanitizer tools including memcheck, racecheck, synccheck, and initcheck, combined with targeted device-side printf strategies to validate memory access, thread synchronization, and initialization before profiling.

What's the best way to profile Tensor Core usage on B200 GPUs?

Profile Tensor Core usage on B200 GPUs by running nsys for initial hotspot discovery, then use ncu for detailed kernel-level diagnosis of occupancy, stalls, coalescing, register pressure, shared-memory bottlenecks, and TensorCore utilization.

Does NVIDIA B200 support cluster portability across different Blackwell targets?

NVIDIA B200 supports cluster portability but requires separating generic sm_100 targets from architecture-specific sm_100a targets, with shared-memory carveout options and cluster constraints factored into tuning decisions to ensure compatibility.

Why does my CUDA kernel fail to compile for B200 compute capability 10.0?

CUDA kernels may fail for B200 compute capability 10.0 if the wrong nvcc target is selected; use generic sm_100 or compute_100 for broad compatibility, or sm_100a for architecture-specific features, ensuring proper PTX inclusion when required.