cutedsl

Guide writing, debugging, and optimizing GPU kernels with NVIDIA CuTe DSL.

3|Updated Mar 29, 2026
One-click install
npx skills add https://github.com/Shekswess/gpu-kernel-skills --skill cutedsl
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: cutedsl
Source: https://github.com/Shekswess/gpu-kernel-skills/tree/main/cutedsl
Command: npx skills add https://github.com/Shekswess/gpu-kernel-skills --skill cutedsl

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve?

NVIDIA CuTe DSL enables writing CUTLASS-grade GPU kernels in Python. It compiles through AST rewrite + tracing → MLIR → ptxas, delivering the same PTX/SASS quality as C++ CUTLASS with dramatically faster compilation.

Core Features & Use Cases

  • Guides users on how to approach CuTe DSL tasks — the decision sequences, workflow, and judgment calls, not just the API surface.
  • Points to architecture-specific code patterns and API details in the official references, including references/api_reference.md and references/kernel_patterns.md.
  • Helps with porting C++ CUTLASS kernels to Python CuTe DSL, debugging, and optimizing kernels.

Quick Start

Provide a CuTe DSL kernel outline or review a CuTe DSL snippet and suggest improvements.

Frequently Asked Questions about cutedsl

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I write and optimize GPU kernels using CuTe DSL in Python?

You can port C++ CUTLASS kernels to Python CuTe DSL by translating the core logic and utilizing the Skill's API references to map CUTLASS C++ structures into equivalent Python CuTe DSL patterns.

Can I use CuTe DSL to debug tiled MMA and copy workflows for GPU kernels?

Yes, CuTe DSL supports debugging tiled MMA and copy workflows by applying architecture-specific guidance and referencing kernel patterns to structure your approach for TMA and WGMMA operations.

Does CuTe DSL deliver the same PTX quality as C++ CUTLASS?

CuTe DSL compiles through AST rewrite, tracing, and MLIR to ptxas, delivering the same high-quality PTX/SASS output as C++ CUTLASS but with dramatically faster compilation times.

What is the best way to structure a CuTe DSL kernel for tcgen05 architectures?

The best way to structure a CuTe DSL kernel for tcgen05 is to read the architecture-specific reference materials and use the frontmatter-driven entry points to apply the correct kernel patterns.

Why does my C++ CUTLASS kernel port to Python CuTe DSL fail to compile?

Porting C++ CUTLASS kernels to Python CuTe DSL may fail if architecture-specific API details are missed, requiring a review of the api_reference.md and kernel_patterns.md to ensure correct mapping.