What problem does it solve?
Draw.io is a versatile tool for FPGA/HLS diagrams, but creating consistent, production-ready diagrams across multiple types (system topology, DATAFLOW, FSM, RTL micro-architecture) can be time-consuming and error-prone. This skill provides a unified, XML-based approach to generate diagrams that adhere to a color palette, layout guidelines, and a predictable structure, enabling easier automation and documentation.
Core Features & Use Cases
- Generate diagrams in Draw.io XML format for FPGA/HLS designs, including system topology, DATAFLOW decompositions, FSM state diagrams, and RTL micro-architectures.
- Enforce a semantic color palette, consistent edge styles, and DATAFLOW stage borders, with optional companion machine-readable JSON (.arch.json).
- Include a reference library of reusable components and best practices, enabling rapid diagram creation and standardization across projects.
Quick Start
Describe the desired diagram (e.g., "system block diagram for module X") and have Claude Code generate a .drawio XML file.