drc-native

Run KiCad native DRC to identify PCB rule violations and filter known-acceptable ones.

2|Updated Feb 8, 2026

Search Tags:#baseline #pcb #kicad #drc #violation #fix-suggestions #smart-filtering

Ready to run

npx skills add https://github.com/pjcau/esp32-emu-turbo --skill drc-native

💬 Prompt for ChatGPT / Claude Chat▼

Please help me install this Agent Skill.
Skill: drc-native
Source: https://github.com/pjcau/esp32-emu-turbo/tree/main/.claude/skills/drc-native
Command: npx skills add https://github.com/pjcau/esp32-emu-turbo --skill drc-native

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes scripts (resource) components.

What problem does it solve?

Manual KiCad DRC generates many violations, making it hard to distinguish real issues from expected ones and track changes over time.

Core Features & Use Cases

Smart Filtering: Separates known‑acceptable violations from real problems.
Delta Tracking: Compares current DRC results with a saved baseline to highlight new issues.
Fix Suggestions: Maps each violation to the source script that created it and proposes corrective actions. Use it when iterating on PCB designs for the ESP32‑emu‑turbo project to keep the board layout clean and production‑ready.

Quick Start

Request the skill to run a KiCad DRC scan on the ESP32‑emu‑turbo PCB and receive a filtered list of actionable violations.

Frequently Asked Questions about drc-native

High-intent search queries and answers about installing and using this skill.

FAQPage Schema

How do I filter known-acceptable DRC violations from a KiCad PCB layout?▼

To filter KiCad DRC violations, run the native DRC scan and apply smart filtering to separate known-acceptable layout issues from real problems. This targets clearance, copper, and silkscreen errors, ensuring you only review actionable violations during PCB design iterations.

What is the best way to track new DRC violations between PCB design iterations?▼

Tracking new DRC violations between iterations is done by comparing current scan results against a saved baseline JSON. This delta tracking highlights newly introduced clearance or silkscreen errors, making it easier to monitor PCB rule changes over time.

How do I get source code fix suggestions for KiCad DRC errors?▼

To get fix suggestions for KiCad DRC errors, the violation report maps each issue to the specific Python source script that created it. It then proposes corrective actions, helping you resolve clearance and copper violations directly in the layout scripts.

Can I use KiCad native DRC for ESP32 hardware designs?▼

Yes, you can run KiCad native DRC specifically for ESP32-emu-turbo hardware designs. It applies filtered analysis to identify and manage clearance, copper, and silkscreen errors, keeping the custom board layout clean and production-ready.

Why does my KiCad DRC report so many acceptable violations?▼

KiCad DRC reports many acceptable violations because manual scans lack contextual filtering. By applying smart filtering and tracking deltas from a baseline, you can distinguish expected layout issues from genuine clearance and copper problems.

How do I run a DRC scan on the ESP32-emu-turbo PCB?▼

To run a DRC scan on the ESP32-emu-turbo PCB, request the scan to execute the native KiCad DRC. You will receive a filtered list of actionable violations, mapped to their source scripts with proposed fixes for production readiness.