drc-native

To filter KiCad DRC violations, run the native DRC scan and apply smart filtering to separate known-acceptable layout issues from real problems. This targets clearance, copper, and silkscreen errors, ensuring you only review actionable violations during PCB design iterations.

Tracking new DRC violations between iterations is done by comparing current scan results against a saved baseline JSON. This delta tracking highlights newly introduced clearance or silkscreen errors, making it easier to monitor PCB rule changes over time.

To get fix suggestions for KiCad DRC errors, the violation report maps each issue to the specific Python source script that created it. It then proposes corrective actions, helping you resolve clearance and copper violations directly in the layout scripts.

Yes, you can run KiCad native DRC specifically for ESP32-emu-turbo hardware designs. It applies filtered analysis to identify and manage clearance, copper, and silkscreen errors, keeping the custom board layout clean and production-ready.

KiCad DRC reports many acceptable violations because manual scans lack contextual filtering. By applying smart filtering and tracking deltas from a baseline, you can distinguish expected layout issues from genuine clearance and copper problems.

To run a DRC scan on the ESP32-emu-turbo PCB, request the scan to execute the native KiCad DRC. You will receive a filtered list of actionable violations, mapped to their source scripts with proposed fixes for production readiness.