What problem does it solve? Writing a first working AscendDSL kernel for an NPU operator from scratch is error-prone: developers must get core partitioning, UB tiling, copyin/compute/copyout structure, and hardware constraints right before any optimization can begin. This Skill converts a functional PyTorch operator definition into a complete, verified AscendDSL baseline implementation. ## Core Features & Use Cases - Category-based example selection: Picks a proven reference implementation (element-wise, reduction, normalization, scan, matmul, gather, pooling, loss, top-k, transpose) matching the operator's compute pattern. - Hardware-aware tiling: Reads env.json for ub_size and vector_core_cnt, uses tl.num_vec_cores() with pivot distribution instead of hardcoded core counts. - Transpose/conversion guardrails: Enforces DataCopyPad 32B slot layout, blockCount ≤ 4095, correct perm/stride semantics, and contiguous-row fast paths to avoid known runtime failures. - Use Case: After a project scaffold is created for a new NPU operator like layer_norm or cumsum, invoke this Skill to produce output/{op_name}/{op_name}_dsl.py with a full, placeholder-free implementation that passes a verification checklist. ## Quick Start Generate the AscendDSL baseline for the operator defined in my functional PyTorch file and save it to the output directory.
