What problem does it solve? Embedded driver code often ships with hardware configuration errors (DMA overflows, wrong init sequences) and code quality violations (MISRA C) because reviews are skipped or inconsistent. This Skill enforces a disciplined task-by-task execution workflow where every generated driver passes a two-stage review before being committed. ## Core Features & Use Cases - Plan-Driven Execution: Loads a driver implementation plan from docs/embedded/plans and executes each task with a fresh subagent, tracking progress via a todo list. - Two-Stage Review Gate: Runs a hardware validator (DMA limits, interface config, init sequence) followed by a code quality reviewer (MISRA C, DRY, YAGNI) after every task, blocking progress until both approve. - Status Handling: Manages DONE, DONE_WITH_CONCERNS, NEEDS_DATASHEET, and BLOCKED statuses, then hands off to embedded-verification for the build-flash-monitor loop. - Use Case: After designing a UART driver plan for an STM32 target, run this Skill to generate the header and source files task by task, catching a DMA buffer over 4092 bytes in Stage 1 and a MISRA C violation in Stage 2 before any code is committed. ## Quick Start Execute the implementation plan at docs/embedded/plans for my driver, running the hardware and code quality reviews after each task.