esp-amp-skill

Generates ESP-AMP asymmetric multiprocessing firmware with inter-core IPC for ESP32-C5/C6/P4.

28|3|Updated Jun 24, 2026
One-click install
npx skills add https://github.com/JasonYANG170/esp-dev-skill --skill esp-amp-skill-jasonyang170
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: esp-amp-skill
Source: https://github.com/JasonYANG170/esp-dev-skill/tree/main/repos/esp-amp
Command: npx skills add https://github.com/JasonYANG170/esp-dev-skill --skill esp-amp-skill-jasonyang170

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve? Developing dual-core firmware with Espressif's ESP-AMP framework requires precise knowledge of maincore/subcore initialization order, IPC pairing rules, memory layout constraints, and build system configuration—mistakes in any of these produce broken or silently failing firmware. This Skill grounds AI code generation in the real esp-amp repository documentation and source, preventing common errors like missing EVENT_SUBCORE_READY handshakes, RPMsg buffer leaks, and misconfigured sdkconfig memory layouts. ## Core Features & Use Cases - Scenario Recipes: 11 step-by-step recipes covering unified/separate builds, subcore lifecycle, shared memory, software interrupts, events, virtqueues, RPMsg, RPC, light sleep, and subcore peripherals, each with complete call chains and copyable code. - API & Config Reference: Real function signatures from esp_amp_*.h headers and Kconfig symbols with per-target defaults and valid ranges for ESP32-C5, ESP32-C6, and ESP32-P4. - Pitfall Prevention: 37 documented WRONG/CORRECT pitfalls covering initialization, Event binding, RPMsg pairing, ISR safety, and light sleep constraints. - Use Case: A developer asks to create a new ESP32-C6 project where the LP core polls a sensor and reports to the HP core via RPMsg; the Skill selects the rpmsg_send_recv example as a template, generates both maincore app_main.c and subcore main.c with correct handshake, and provides the unified build CMake structure. ## Quick Start Ask the AI agent to create an ESP-AMP project for ESP32-C6 where the maincore and LP subcore exchange messages over RPMsg, and it will generate the complete dual-core project structure with build commands.

Frequently Asked Questions about esp-amp-skill

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I set up inter-core communication between ESP32-C6 HP and LP cores?

Use the ESP-AMP framework: call esp_amp_init() on both cores, initialize RPMsg with esp_amp_rpmsg_main_init on the maincore and esp_amp_rpmsg_sub_init on the subcore, then handshake via EVENT_SUBCORE_READY before exchanging messages. The Skill's rpmsg recipe provides the complete working code.

What is the difference between unified build and separate build in ESP-AMP?

Unified build compiles maincore and subcore firmware with a single idf.py build command and supports embedding the subcore binary or flashing it to a partition. Separate build uses two independent projects requiring manual esptool flashing of the subcore binary and manually synchronized sdkconfig settings.

Which ESP32 chips support ESP-AMP asymmetric multiprocessing?

ESP-AMP supports ESP32-C5 and ESP32-C6 with an LP core subcore requiring ESP-IDF v5.5+ and v5.3.1+ respectively, and ESP32-P4 with an HP core subcore requiring v5.3.1+. The subcore always runs bare-metal; P4 LP core is not yet supported.

Why does my FreeRTOS task never wake up when waiting on an ESP-AMP event?

The ESP-AMP event was not bound to a FreeRTOS EventGroup. You must call esp_amp_event_bind_handle with the event's SysInfo ID and an EventGroupHandle before waiting, otherwise the blocking task is never notified when the other core signals the event.

Why does RPMsg stop sending after a few messages on ESP-AMP?

The receive buffers are exhausted because the receiving endpoint did not call esp_amp_rpmsg_destroy after processing each message. Also verify that send() is not mixed with create_message(), since that pairing leaks buffers the same way.

Can the LP subcore use floating point or malloc in ESP-AMP?

Neither HP nor LP subcores support printing floats, and the LP core has no hardware FPU so all floating point is slow software emulation. malloc requires enabling CONFIG_ESP_AMP_SUBCORE_ENABLE_HEAP with a configured heap size, otherwise it returns -1 at runtime.