What problem does it solve? Building an ESP-Hosted link between a host MCU and an ESP co-processor involves strict init ordering, matching transport configuration on both firmware images, chip-specific constraints, and many silent failure modes. This Skill grounds AI code generation in the real esp-hosted-mcu repository documentation, headers, and Kconfig symbols so the generated host and slave projects actually build and connect. ## Core Features & Use Cases - Transport bring-up recipes: Step-by-step SPI Full-Duplex, SDIO 1/4-bit, and UART link setup with pin maps, pull-up requirements, and link verification logs. - Host application recipes: Wi-Fi STA over RPC, ESP_HOSTED_EVENT handling with heartbeat-based transport recovery, co-processor BT controller enablement (v2.5.2+), GPIO expander, and DPP enrollee onboarding. - Advanced features: Co-processor OTA over the live transport, host deep-sleep power save, Network Split, Wi-Fi 6 iTWT, external coexistence (EXT_COEX), and OpenThread/Zigbee RCP. - Grounded references: Real esp_hosted_* API signatures, Kconfig symbol tables, 24+ consolidated pitfalls, and an index of the repository's example projects. - Use Case: Pairing an ESP32-P4 host with an ESP32-C6 co-processor over SDIO 4-bit — the Skill walks through slave firmware generation, host dependency setup (esp_wifi_remote + esp_hosted, removing esp-extconn), wiring with 51 kΩ pull-ups, and verifying the TRANSPORT_UP event before running Wi-Fi code. ## Quick Start Ask the AI to set up an ESP-Hosted link between your host chip and co-processor over SPI, SDIO, or UART, specifying both chip targets and the features you need such as Wi-Fi STA or Bluetooth.
