What problem does it solve? Kernel changes in fla/ops often ship with incomplete test coverage across sequence layouts, directions, gate modes, and backends, leading to silent numerical bugs on NVIDIA, AMD, or Intel hardware. This Skill provides a systematic checklist for verifying kernel correctness and closing coverage gaps before submitting a merge request. ## Core Features & Use Cases - Coverage Matrix Audit: Compares existing tests against nine coverage axes including varlen layout, forward/backward direction, gate and beta modes, QK normalization, state passing, GVA, and head dimension variants. - Triton Safety Checks: Enforces int64 address arithmetic, narrow grid-dimension handling on non-NVIDIA backends, and avoidance of deprecated tl.make_block_ptr APIs. - Platform-Aware Test Style: Directs use of fla.utils device helpers and IS_NVIDIA/IS_AMD/IS_INTEL flags instead of hard-coded torch.cuda checks. - Use Case: When modifying the Gated DeltaNet kernel, use this Skill to identify missing varlen backward tests, add them under tests/ops/test_gdn.py, and run pytest to confirm correctness. ## Quick Start Ask the assistant to review the test coverage for the kernel you just modified in fla/ops and suggest which tests to add before opening the MR.