gmoverid

Automate transistor characterization and sizing with the gm/ID methodology.

118|23|Updated Mar 8, 2026
One-click install
npx skills add https://github.com/Arcadia-1/gmoverid-skill --skill gmoverid
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: gmoverid
Source: https://github.com/Arcadia-1/gmoverid-skill/tree/main/gmoverid
Command: npx skills add https://github.com/Arcadia-1/gmoverid-skill --skill gmoverid

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes scripts (resource) and references (resource) and assets (resource) components.

What problem does it solve?

This Skill automates the complex process of characterizing transistor behavior and sizing devices using the advanced gm/ID methodology, replacing error-prone manual calculations with simulation-driven insights.

Core Features & Use Cases

  • Transistor Characterization: Generates standard plots (IV, gate capacitance, gm/ID curves) for various technology nodes.
  • Design API: Provides Python functions (GmIdTable) to look up device parameters and automatically size transistors based on target specifications like Id, W, fT, or gm·ro.
  • Use Case: An analog circuit designer needs to size an NMOS transistor for a specific gain and bandwidth target. They use the GmIdTable API to find the optimal W/L ratio and bias point, ensuring the design meets performance goals across different technology nodes.

Quick Start

Use the gmoverid skill to size an NMOS transistor with a target gm/ID of 15 V^-1 and a drain current of 100 microamps.

Frequently Asked Questions about gmoverid

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I size a transistor using the gm/ID methodology in Python?

You can size a transistor using the gm/ID methodology by utilizing a Python API to look up device parameters and derive optimal dimensions automatically based on target specifications like drain current, speed, and gain.

What is the gm/ID methodology for analog circuit design?

The gm/ID methodology is an advanced approach for analog circuit design that uses simulation-driven insights to characterize transistor behavior and replace error-prone manual calculations for optimal device sizing across different technology nodes.

Can I simulate transistor characterization for multiple technology nodes like 45nm and 22nm?

Yes, you can simulate transistor characterization across multiple technology nodes including PTM 180nm, 45nm, and 22nm HP nodes using built-in model files to generate standard performance plots like IV and gate capacitance curves.

How do I find the optimal W/L ratio for an NMOS transistor targeting a specific gain and bandwidth?

To find the optimal W/L ratio for an NMOS transistor, you can query a design API with your target gain and bandwidth specifications to retrieve the optimal transistor dimensions and bias point from pre-characterized simulation data.

Does gmoverid require external ngspice simulation files to generate gm/ID curves?

No, it does not require external simulation files because it supports PTM 180nm, 45nm, and 22nm HP nodes with built-in model files to automatically generate detailed gm/ID curves and standard characterization plots.