What problem does it solve?
Optimizing MNN's Hexagon/HVX/HMX DSP backend is error-prone: intuition-driven micro-optimizations often fail, host/DSP build mismatches silently corrupt measurements, and v79/v81 architecture differences invalidate conclusions. This Skill encodes hard-won measurement discipline, phase-level profiling, and verified bottleneck patterns so changes are driven by real device data.
Core Features & Use Cases
- Phase-level profiling guidance: Use gated profilers (HTP_MM_PHASE_PROFILE, HTP_QATTN_PHASE_PROFILE, HTP_WATTN_PHASE_PROFILE) to decompose operator time before optimizing.
- Build and measurement discipline: Enforces host+DSP rebuild pairing, noise-band awareness, baseline re-testing, and per-architecture (v79/v81) validation.
- Known bottleneck patterns and disproven directions: Documents DMA transfer-count costs, issue-bound writebacks, VTCM sizing hazards, and optimizations already measured to fail.
- cDSP crash diagnosis: Provides logcat, tombstone, and ramdump inspection procedures for qurt/cDSP failures.
- Use Case: When a matmul operator on Hexagon seems slow, use this Skill to discover via phase profiling that only 4% of time is actual compute while 49% is output writeback, then optimize the real bottleneck.
Quick Start
Use the hexagon-optimization skill to analyze the DSPOpType profile output of my MNN model and identify which phase of the prefill GEMM operator to optimize.