hw-analysis

Generate Yocto BSP artifacts from hardware schematics and SoC datasheets.

2|1|Updated Mar 22, 2026
One-click install
npx skills add https://github.com/solitasroh/rkit --skill hw-analysis
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: hw-analysis
Source: https://github.com/solitasroh/rkit/tree/main/skills/hw-analysis
Command: npx skills add https://github.com/solitasroh/rkit --skill hw-analysis

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

Analyzing hardware schematics and SoC datasheets to generate Yocto BSP artifacts (DTS, defconfig, and driver bbappend), bridging hardware design to software builds.

Core Features & Use Cases

  • Hardware-to-Software Mapping: Translate schematics and datasheets into DTS overlays and kernel configs.
  • Pin Mapping & DTS Generation: Create accurate pinmux maps and device tree fragments for board support.
  • Driver BBAppend Mapping: Map external ICs to kernel drivers and bbappend stubs.

Quick Start

Run the hardware analysis workflow against your board to generate DTS, defconfig, and driver bbappend artifacts.

Frequently Asked Questions about hw-analysis

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I generate Yocto BSP device tree overlays from hardware schematics?

To generate Yocto BSP device tree overlays from hardware schematics, this Skill analyzes SoC datasheets and schematics to extract pinmaps and output DTS fragments, defconfig, and driver bbappend artifacts.

What is the best way to map SoC peripherals to a device tree for STM32MP boards?

Mapping SoC peripherals to a device tree for STM32MP boards involves extracting pinmux configurations from schematics and applying validation against datasheets to ensure accurate DTS generation.

How do I create driver bbappend stubs for external ICs in a Yocto BSP?

Creating driver bbappend stubs for external ICs in a Yocto BSP is done by mapping hardware blocks from schematics to kernel drivers, generating the necessary bbappend stubs during the hardware analysis workflow.

Can I use this hardware analysis workflow for MCU boards without MPU peripherals?

Yes, the hardware analysis workflow applies to both MCU and MPU boards, analyzing SoC peripherals to perform pinmap extraction, DTS generation, and driver mapping for your specific hardware.

Do I need to provide SoC datasheets to generate defconfig and DTS artifacts?

Yes, providing SoC datasheets is required to generate defconfig and DTS artifacts, as the Skill integrates validation against datasheets to ensure accurate and maintainable Yocto BSP outputs.

Why does my pinmap extraction fail to validate against the hardware datasheet?

Pinmap extraction may fail to validate against the hardware datasheet if schematic inputs are incomplete or mismatched, as the workflow integrates .env checks and datasheet validation to ensure accurate BSP generation.