kicad

Schematic-to-PCB mismatch checking cross-references footprints and pin mappings between .kicad_sch and .kicad_pcb files to catch header pin swaps and footprint inconsistencies. It produces a unified report highlighting discrepancies for design verification.

An ERC/DRC analysis report includes extracted nets, BOMs, and cross-sheet connections validated against raw files and datasheets. It identifies design-rule issues across schematic and PCB layouts to support fabrication readiness and procurement.

Gerber files and PDF schematics can be analyzed to extract subcircuits, component values, and schematic information for reuse. The tooling processes Gerbers and PDFs alongside native KiCad formats to extract design data for unified reporting.

The cross-reference tool supports KiCad 5 through 9 project files, including .kicad_sch, .kicad_pcb, and .kicad_pro formats. It parses these files using a shared sexp_parser to extract nets and validate outputs against raw files.

BOMs and netlists are exported from KiCad schematics by running analyze_schematic.py, which extracts component lists and net information. These exports support procurement and PCB fabrication by providing validated design data.

A sexp_parser dependency is needed for KiCad project analysis because KiCad files use S-expression syntax. The parser reads .kicad_sch and .kicad_pcb files so the analyzers can extract nets, BOMs, and cross-sheet connections accurately.