milimo-ai-pipeline-expert

Coordinate VRAM management between LTX-2 and Flux 2 pipelines on Apple Silicon.

83|18|Updated Jan 25, 2026
One-click install
npx skills add https://github.com/mainza-ai/milimovideo --skill milimo-ai-pipeline-expert
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: milimo-ai-pipeline-expert
Source: https://github.com/mainza-ai/milimovideo/tree/main/skills/skills/milimo-ai-pipeline-expert
Command: npx skills add https://github.com/mainza-ai/milimovideo --skill milimo-ai-pipeline-expert

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

Deep expertise on LTX-2 video pipelines, Flux 2 image/inpainting pipelines, and memory coordination on unified Apple Silicon hardware. Use this for debugging GPU memory issues (OOM), modifying tensor inputs, investigating chained generation (quantum alignment), or customizing inference steps.

Core Features & Use Cases

  • Memory coordination between LTX-2 and Flux 2 to prevent unified memory OOM crashes.
  • Explicit pre-load sequencing (memory_manager.prepare_for("video") / ("image")) and manual cache management for MPS.
  • Debugged pipelines for chained generation and quantum alignment with memory-aware adjustments.

Quick Start

Tune memory management for LTX-2 and Flux 2 on Apple Silicon to prevent OOM during chained generation.

Frequently Asked Questions about milimo-ai-pipeline-expert

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I fix GPU out of memory crashes during LTX-2 and Flux 2 chained generation on Apple Silicon?

To resolve OOM crashes during chained generation, implement explicit memory coordination using memory_manager.prepare_for("video") and manual cache management between LTX-2 and Flux 2 pipeline swaps.

Why does my MPS VAE throw float32 errors when swapping between LTX-2 video and Flux 2 image pipelines?

MPS-specific VAE float32 handling requires manual configuration during pipeline swaps. You must apply memory-aware adjustments and explicit pre-load sequencing to prevent tensor input errors when switching between video and image generation.

What is memory coordination for chained generation on Apple Silicon unified memory?

Memory coordination on Apple Silicon uses memory_manager.prepare_for to explicitly sequence pre-loading for LTX-2 and Flux 2 pipelines, preventing OOM crashes during quantum alignment and chained generation tasks.

Can I customize inference steps for LTX-2 video pipelines without triggering OOM on Apple Silicon?

Yes, you can customize inference steps for LTX-2 video pipelines by applying explicit memory coordination via memory_manager.prepare_for and manual cache management to avoid triggering OOM crashes.

What are the limitations of running chained generation with LTX-2 and Flux 2 on Apple Silicon?

The primary limitation is unified memory OOM crashes without manual cache management. You must use MPS-specific VAE float32 handling and memory_manager.prepare_for to safely investigate chained generation and quantum alignment.