osdev-cpu-tables

What problem does it solve?

Provides a concise, authoritative reference and checklist for correctly building and loading the x86/x86-64 Global Descriptor Table, Interrupt Descriptor Table, and Task State Segment so kernels and low-level OS components avoid triple faults, invalid TSS/GPF errors, and misrouted interrupts during boot and runtime.

Core Features & Use Cases

• GDT guidance: Flat-model segment layouts, access bytes, flags, selector offsets, and the special 16-byte TSS descriptor layout for long mode.
• IDT & gate types: Gate formats, DPL considerations, interrupt vs trap gate behavior, and ISR stub patterns to normalize error codes.
• TSS & IST: 32-bit and 64-bit TSS layouts, RSP0/ESP0 updates, IST usage for double-fault/NMI protection, and LTR loading semantics.
• Operational checklist: Correct ordering for LGDT, segment reload, TSS init and LTR, IDT build and LIDT, and safe enabling of interrupts to avoid boot-time faults.
• Use case examples: Entering protected or long mode, setting up kernel/user selectors, creating syscall gates, and hardening interrupt paths for kernel reliability.

Quick Start

Build a flat GDT with code/data and a TSS descriptor, LGDT and reload segments (far jump for CS), initialize TSS RSP0 and IST stacks, LTR the TSS selector, construct IDT gates with correct type and DPL, LIDT the table, and only then enable interrupts.