osdev-paging

What problem does it solve?

Provides a concise, architecture-agnostic reference for implementing paging and virtual memory in operating system kernels, covering page table structures, flags, TLB management, and higher-half strategies across x86, x86-64, ARM, and RISC-V.

Core Features & Use Cases

• Comprehensive paging references for 4-level x86-64, 2-level ARM, and RISC-V Sv39/Sv48 paging schemes.
• Detailed descriptions of PDE/PTE flags, huge pages, canonical addressing, and TLB invalidation strategies.
• Cross-architecture guidance for boot-time identity mapping, higher-half kernel mapping, and cross-architecture memory management.
• See the included references to architecture-specific paging guides for in-depth code patterns and diagrams.

Quick Start

Start by reading the reference sections on x86-64 paging and ARM paging to understand the basics and then implement a minimal identity-mapped page table.