osdev-storage

Implement ATA, AHCI, and NVMe block storage drivers in OS kernels.

Updated Aug 27, 2026
One-click install
npx skills add https://github.com/Maelwalser/claude-config --skill osdev-storage
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: osdev-storage
Source: https://github.com/Maelwalser/claude-config/tree/main/skills/osdev-storage
Command: npx skills add https://github.com/Maelwalser/claude-config --skill osdev-storage

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve?

OS kernel developers need reliable, example-rich guidance to implement block storage drivers across ATA, AHCI, and NVMe; this Skill provides comprehensive references to guide implementation and testing in real-world projects.

Core Features & Use Cases

  • ATA PIO mode references including IO ports, status flags, and the 400ns delay technique.
  • AHCI/NVMe driver patterns with port initialization, command issuance, and memory-structure diagrams.
  • Real-world use: building a cross-port block-device layer in a microkernel or monolithic OS.

Quick Start

Review the AHCI and NVMe references and implement a minimal read path for a single SATA port.

Frequently Asked Questions about osdev-storage

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I implement an AHCI driver for OS kernel development?

To implement an AHCI driver in OS kernel development, initialize SATA ports, issue commands, and set up memory structures using detailed PRDT and FIS formats provided by the Skill's comprehensive references.

What is the 400ns delay technique for ATA PIO mode?

The 400ns delay technique for ATA PIO mode waits for disk status flags to settle by reading an alternate status port multiple times, ensuring reliable IO port communication during block storage driver initialization.

How do I initialize NVMe ports and format commands in a custom kernel?

Initialize NVMe ports in a custom kernel by configuring memory structures and issuing port initialization commands, using the Skill's end-to-end workflow references to guide command formats and testing.

Can I use this storage driver guidance for a microkernel architecture?

Yes, you can use this storage driver guidance for a microkernel architecture, as it supports building a cross-port block-device layer adaptable to both microkernel and monolithic OS designs.

What's the best way to start building a block storage driver for ATA and NVMe?

The best way to start building a block storage driver is reviewing the AHCI and NVMe references, then implementing a minimal read path for a single SATA port before expanding to ATA PIO and NVMe.

Why does my AHCI command submission fail during port initialization?

AHCI command submission fails during port initialization when memory structures like command lists or PRDT entries are misaligned, requiring strict adherence to FIS formats and port setup workflows detailed in the references.