skills.rest
WangWindow
WangWindowCOMMUNITY
Explore all skills by this author →
WebsiteGitHub

shmem-ops-design

Generates SHMEM communication operator design documents from requirements using a Canonical DSL.

Updated Sep 15, 2026
Search Tags:#design document#collective communication#operator design#ascend npu#core allocation#shmem#canonical dsl
One-click install
npx skills add https://github.com/WangWindow/CANN-BatchMatMulMaxsum --skill shmem-ops-design-wangwindow
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: shmem-ops-design
Source: https://github.com/WangWindow/CANN-BatchMatMulMaxsum/tree/main/.agents/skills/shmem-ops-design
Command: npx skills add https://github.com/WangWindow/CANN-BatchMatMulMaxsum --skill shmem-ops-design-wangwindow

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve? Designing SHMEM communication and fused compute-communication operators for Ascend NPUs requires deep knowledge of PE topology, symmetric memory, core allocation, and synchronization primitives. This Skill converts natural-language requirements, pseudocode, or heterogeneous reference implementations into a structured design.md that downstream code generation can consume directly. ## Core Features & Use Cases - Canonical DSL Normalization: Lifts user requirements into a structured YAML DSL covering interface, semantics, topology, memory, schedule, correctness, and performance. - Capability Mapping & Gap Analysis: Classifies every requirement as reusable, adaptable, or new implementation against existing SHMEM APIs, templates, and examples. - Core Partition & Schedule Design: Designs AIV/AIC core allocation, tiling, phases, and cross-PE synchronization following documented patterns (all-cooperate, per-PE grouping, role-split, CoC fusion). - Use Case: Given a requirement for a fused MatMul + AllReduce operator on an 8-card 910B full-mesh server, produce a complete design.md with DSL, capability mapping, 12-item design review, and compile/test contract ready for handoff to code generation. ## Quick Start Ask the assistant to design a SHMEM operator from your requirement description or pseudocode and produce the design.md document.

Frequently Asked Questions about shmem-ops-design

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I design a SHMEM communication operator for Ascend NPU?▼

Provide your requirement as natural language, pseudocode, or a reference implementation. The Skill normalizes it into a Canonical DSL covering interface, semantics, topology, memory, and schedule, then outputs a design.md ready for code generation.

What is the Canonical DSL in SHMEM operator design?▼

The Canonical DSL is a structured YAML block that serves as the single source of truth for the design. It defines meta, interface, semantics, topology, memory, schedule with core_partition and tiling, correctness invariants, and performance baselines.

Does the design skill support fused compute-communication operators?▼

Yes, it supports fused_compute_comm operators combining Cube matmul with SHMEM cross-PE communication. It requires a compute_path declaration, defaults to device_catlass_coc, and mandates an HCCL baseline when an equivalent collective primitive exists.

What information must be confirmed before starting the design?▼

The op_name, dtype, build_mode, torch_required, performance flags, and network topology must be read from phase0_intake before design begins. Missing critical semantics are reported as blocking questions rather than silently assumed.

What are the limitations of the design document output?▼

The Skill only produces the design.md document and never generates implementation code. It also forbids Host-side RMA as the main communication path and requires a unified single-path kernel unless profiling proves a size-branch benefit of at least 5 percent.

Related Skills

Explore More Software Engineering Skills→
xchang1121xchang1121
6

performance-summary

Aggregate performance metrics from verify_<op_name>/result.json files across operators.

Community
Intermediate
AscendAscend
31

ascendc-operator-code-gen

Generate AscendC operator host/kernel code from design docs and integrate into PyTorch.

Official
Advanced
DreamMacerDreamMacer

deepep-to-cam-converter

Migrate DeepEP MoE dispatch and combine operators to CAM operators on Ascend NPU.

Community
Advanced
xchang1121xchang1121
6

catlass-epilogue-composition

Compose CATLASS matmul epilogues for fused elementwise operators on Ascend hardware.

Community
Intermediate