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sketch-design

Generate neural network operator sketches using UnifiedSketch DSL.

258|48|Updated Jun 22, 2020
Search Tags:#design#dsl#kernel-design#unifiedsketch#operator-sketch#llm_hint#hardware-optimizations
One-click install
npx skills add https://github.com/mindspore-ai/akg --skill sketch-design-mindspore-ai
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: sketch-design
Source: https://github.com/mindspore-ai/akg/tree/main/akg_agents/python/akg_agents/op/resources/skills/designer/sketch-design
Command: npx skills add https://github.com/mindspore-ai/akg --skill sketch-design-mindspore-ai

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

UnifiedSketch provides a formal language and workflow to design, generate, and reason about operator sketches, reducing ambiguity and enabling rapid kernel prototyping.

Core Features & Use Cases

  • DSL for declaring symbols, tensors, and memory semantics to standardize operator design
  • llm_hint driven guidance to steer hardware-specific optimizations (GPU/NPU/CPU)
  • Templates for common primitives (matmul, relu, softmax) and a path for iterative refinement
  • Workflow that integrates frontmatter metadata with in-context instructions for automation

Quick Start

Create a minimal UnifiedSketch sketch with symbols and tensors, then apply llm_hint decorators to guide optimization.

Frequently Asked Questions about sketch-design

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I design neural network operator sketches for hardware-specific optimizations?▼

To design operator sketches, use a DSL to declare symbols, tensors, and memory semantics, applying hint decorators to steer hardware-specific optimizations for CPU, GPU, and NPU backends.

What is a DSL for kernel design and how does it standardize operator creation?▼

A kernel design DSL provides a formal language to define alloc, load, store, and compute semantics, reducing ambiguity and enabling rapid, structured prototyping for primitives like matmul and ReLU.

Can I use llm_hint to guide GPU and NPU optimizations for matmul and ReLU primitives?▼

Yes, llm_hint driven guidance steers hardware-specific optimizations for common primitives like matmul and ReLU, enabling iterative refinement across GPU and NPU backends.

How do I define memory tiling and compute semantics for operator sketches?▼

Defining memory tiling and compute semantics involves creating a sketch with symbols and tensors, then using frontmatter metadata to structure alloc, load, store, and compute operations for automation.

Does this sketching workflow support iterative refinement across different hardware backends?▼

Yes, the sketching workflow supports iterative refinement across CPU, GPU, and NPU backends by integrating frontmatter metadata with in-context instructions and templates for common primitives.

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