What problem does it solve? Writing correct TileLang kernels for Ascend NPU requires knowing dozens of APIs across memory allocation, data movement, GEMM, reduction, scheduling, and synchronization, and misuse causes silent data corruption or compile errors. This Skill provides an indexed reference of correct API usage patterns and constraints. ## Core Features & Use Cases - API Quick Reference: Lookup tables for kernel definition, memory allocation (Developer vs Expert modes), data movement (T.copy), compute (T.gemm_v0, T.reduce_sum/max, T.tile.xxx), scheduling (T.Pipelined, T.Persistent), and synchronization primitives. - Scenario Index: Maps common tasks like GEMM, Softmax, CV-fused operators, multi-core atomic accumulation, sorting, and kernel debugging to the relevant reference documents and key techniques. - Constraint Documentation: Covers fractal size limits for GEMM buffers, memory alignment and capacity limits, T.copy slicing restrictions, T.Parallel SIMD limitations, and dtype-specific hardware path adaptations. - Use Case: When implementing a fused BatchMatmul + ReduceMax + ReduceSum operator on Ascend NPU, consult the GEMM and reduction sections to select correct block sizes, workspace routing between Cube and Vector cores, and pipeline configuration. ## Quick Start Ask how to allocate on-chip memory and move data between GM, L1, UB, and L0 levels when writing a TileLang Ascend kernel.
