verification

Run ERC and DRC checks on KiCad designs and resolve violations.

5|1|Updated Mar 9, 2026
One-click install
npx skills add https://github.com/ProductOfAmerica/mcp-server-kicad --skill verification-productofamerica
Or copy as Structured Prompt for Agentโ–ผ
Please help me install this Agent Skill.
Skill: verification
Source: https://github.com/ProductOfAmerica/mcp-server-kicad/tree/main/skills/verification
Command: npx skills add https://github.com/ProductOfAmerica/mcp-server-kicad --skill verification-productofamerica

SYSTEM DOCUMENTATION & REQUIREMENTS

๐Ÿ’ก This Skill includes scripts (resource) and references (resource) components.

What problem does it solve?

This Skill addresses the critical need to validate KiCad electronic designs by systematically checking for and resolving Electrical Rules Checks (ERC) and Design Rules Checks (DRC) violations, ensuring designs are error-free before manufacturing.

Core Features & Use Cases

  • Automated Design Rule Checks: Runs comprehensive ERC for schematics and DRC for PCBs using MCP tools.
  • Violation Resolution: Provides systematic workflows to fix common errors like unconnected nets, power issues, clearance violations, and track width problems.
  • Pre-Manufacturing Validation: Ensures designs meet all requirements before generating manufacturing files (Gerbers, pick-and-place, BOM).
  • Use Case: After completing a PCB layout, use this Skill to run DRC, identify any clearance violations between traces and pads, and automatically adjust trace widths or reposition components to meet the design rules.

Quick Start

Run the ERC check on the schematic to identify and fix any electrical rule violations.

Frequently Asked Questions about verification

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I run an Electrical Rules Check on a KiCad schematic to find unconnected nets?โ–ผ

To run an Electrical Rules Check (ERC) on a KiCad schematic, use this Skill to systematically identify unconnected nets and power issues. It provides workflows to resolve these violations, ensuring your schematic is error-free before moving to the PCB layout phase.

What is the best way to fix KiCad DRC clearance violations between traces and pads?โ–ผ

The best way to fix KiCad DRC clearance violations is to use this Skill's systematic resolution workflows. It identifies clearance problems between traces and pads, allowing you to automatically adjust trace widths or reposition components to meet your specified design rules.

Can I validate a KiCad PCB design for manufacturing readiness before generating Gerber files?โ–ผ

Yes, you can validate a KiCad PCB design for manufacturing readiness before generating Gerber files. This Skill performs comprehensive Design Rules Checks (DRC) to ensure zero violations, confirming the design is fully production-ready for manufacturing outputs like pick-and-place files.

Does KiCad DRC check track width errors automatically?โ–ผ

KiCad DRC does check track width errors automatically when executed through this Skill. It validates your PCB design by identifying track width problems alongside clearance issues, providing targeted workflows to adjust trace dimensions to meet production standards.

Why do I need to run ERC and DRC checks before outputting KiCad manufacturing files?โ–ผ

You need to run ERC and DRC checks before outputting KiCad manufacturing files to ensure zero electrical and design rule violations. This validation step confirms the design is production-ready, preventing costly manufacturing errors in Gerbers and BOMs.

What KiCad design violations does this Skill resolve?โ–ผ

This Skill resolves KiCad design violations including unconnected nets, power issues, clearance problems, and track width errors. It performs both Electrical Rules Checks on schematics and Design Rules Checks on PCBs to ensure designs meet production standards.