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verify

Run PCB DFM and design verification on KiCad, Gerber, and BOM files.

2|Updated Feb 8, 2026
Search Tags:#verification#pcb#kicad#dfm#jlcpcb#drc#dfa
One-click install
npx skills add https://github.com/pjcau/esp32-emu-turbo --skill verify-pjcau
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: verify
Source: https://github.com/pjcau/esp32-emu-turbo/tree/main/.claude/skills/verify
Command: npx skills add https://github.com/pjcau/esp32-emu-turbo --skill verify-pjcau

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve?

Identifies manufacturing, assembly, and design-rule issues in PCB projects before production to prevent costly re-spins and assembly failures.

Core Features & Use Cases

  • Automated DFM Checks: Run a broad DFM suite including silkscreen, pad and via clearances, annular ring, drill-to-trace, and JLCPCB-specific alignment and file count checks.
  • DFA and Datasheet Validation: Verify BOM/CPL presence and counts, polarity-sensitive parts, pad pitch, package dimensions, and datasheet consistency for components.
  • DRC, Connectivity, and Schematic Sync: Execute rule checks, net connectivity analysis, and cross-validate schematic versus PCB footprints and nets to catch mismatches before fabrication.
  • Use Case: Validate Gerber, KiCad board, and BOM/CPL files prior to ordering JLCPCB manufacturing to ensure all mechanical and electrical constraints meet fabricator requirements.

Quick Start

Use the verify skill to run the DFM, DFA, datasheet, DRC, connectivity, and schematic synchronization checks and produce a consolidated pass/fail summary.

Frequently Asked Questions about verify

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I run DFM checks for JLCPCB manufacturing on KiCad Gerber files?▼

To run DFM checks for JLCPCB, apply automated verification to your KiCad, Gerber, and BOM/CPL files to validate manufacturing readiness, assembly fit, and JLCPCB-specific alignment and file count rules.

What is PCB DFA and datasheet validation for component assembly?▼

PCB DFA and datasheet validation checks BOM/CPL counts, polarity-sensitive parts, pad pitch, and package dimensions against component datasheets to ensure physical compliance and prevent assembly failures.

How do I cross-validate schematic versus PCB footprints and nets to catch mismatches?▼

Cross-validate schematic versus PCB footprints and nets by executing DRC rule checks, net connectivity analysis, and schematic synchronization to identify mismatches before fabrication.

Can I check via and pad clearances automatically before PCB production?▼

Yes, you can check via and pad clearances automatically by running a comprehensive DFM suite that includes annular ring, drill-to-trace, silkscreen, and DRC parameter checks across your PCB project files.

What is the best way to verify manufacturing readiness and prevent PCB re-spins?▼

The best way to verify manufacturing readiness is to run consolidated DFM, DFA, DRC, and connectivity checks across your PCB project, producing a pass/fail summary to prevent costly re-spins.

Do I need BOM and CPL files to validate PCB design for JLCPCB fabrication?▼

Yes, BOM and CPL files are required to validate PCB design for JLCPCB, as DFA checks verify BOM/CPL presence, counts, and component placements to ensure assembly fit and datasheet compliance.

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