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xiao

Map GPIO pins and boot/strap rules for Seeed Studio XIAO boards.

Updated Feb 6, 2026
Search Tags:#GPIO#RP2040#xiao#pinout#board-reference#ESP32C3#nRF52840
One-click install
npx skills add https://github.com/StarSphere-1024/xiao_skills --skill xiao
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: xiao
Source: https://github.com/StarSphere-1024/xiao_skills/tree/main/xiao
Command: npx skills add https://github.com/StarSphere-1024/xiao_skills --skill xiao

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve?

Seeed Studio XIAO boards have a wide array of GPIO mappings and boot/strap rules. This Skill consolidates pin definitions and board references to help developers choose correct pins and understand platform constraints.

Core Features & Use Cases

  • Pinout reference by board and platform
  • Platform sub-skill linking guidance
  • Boot/strap pin safety guidance for Seeed XIAO boards (ESP32C3/C5/C6/S3, nRF, RP2040, SAMD21, MG24, nRF54L15, RA4M1)

Quick Start

Identify the XIAO board and platform to retrieve the exact pin mapping and board reference.

Frequently Asked Questions about xiao

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
What are the GPIO pinouts for Seeed Studio XIAO RP2040 and ESP32C3 boards?▼

XIAO board GPIO pinouts for RP2040 and ESP32C3 map standard peripheral conventions, defining pin assignments and specifications for development. You can retrieve exact pin mappings by identifying your XIAO board and platform.

Which XIAO board pins have boot or strap constraints I should avoid using?▼

Boot and strap pin safety guidance for XIAO boards identifies restricted GPIO pins during startup. This Skill highlights boot/strap rules across ESP32C3/C5/C6/S3, nRF52840, RP2040, SAMD21, MG24, nRF54L15, and RA4M1 platforms to prevent configuration conflicts.

How do I find the correct pin mapping for my XIAO nRF52840 development board?▼

Finding the correct XIAO nRF52840 pin mapping requires identifying the board and platform to retrieve exact pin definitions. This consolidates pinout references to ensure mappings align with standard XIAO peripheral conventions.

Does this XIAO pinout reference cover the ESP32C6 and RP2350 platforms?▼

Yes, the XIAO pinout reference covers ESP32C6 and RP2350 platforms alongside ESP32C3/C5/S3, nRF52840, SAMD21, MG24, nRF54L15, and RA4M1. It provides board specifications and platform sub-skill linking guidance for real-world development.

Why do my GPIO peripherals fail on XIAO boards despite using the default pins?▼

GPIO peripheral failures on XIAO boards often stem from violating boot/strap pin rules or platform constraints. This Skill consolidates pin definitions and safety guidance to ensure your mappings align with standard XIAO peripheral conventions.

Can I get board reference specs for Seeed XIAO SAMD21 and MG24 microcontrollers?▼

Yes, board reference specs for XIAO SAMD21 and MG24 microcontrollers are included. The Skill maps GPIO pins and board specifications for these platforms, guiding reference usage and ensuring pin mappings align with standard XIAO peripheral conventions.

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