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324-pytorch-to-vhdl

Convert PyTorch neural networks into synthesizable VHDL with fixed-point quantization.

Updated May 21, 2026
Search Tags:#pytorch#fpga#vhdl#embedded ai#fixed-point quantization#ghdl simulation#rtl mapping
One-click install
npx skills add https://github.com/ulf1/trading-regime --skill 324-pytorch-to-vhdl
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: 324-pytorch-to-vhdl
Source: https://github.com/ulf1/trading-regime/tree/main/.agent/skills/324-pytorch-to-vhdl
Command: npx skills add https://github.com/ulf1/trading-regime --skill 324-pytorch-to-vhdl

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes assets (resource) components.

What problem does it solve?

Converts PyTorch neural networks into synthesizable VHDL so you can deploy bit-accurate inference on FPGA/ASIC hardware without manual RTL rewriting.

Core Features & Use Cases

  • Fixed-point quantization workflow: Converts model weights to hardware-friendly integer formats such as Q8.8 and Q1.15.
  • Layer-to-RTL mapping orchestration: Maps common PyTorch layers (e.g., nn.Linear, nn.ReLU, activations) to VHDL-friendly structures like MAC arrays and comparators using a layer rules knowledge base.
  • Simulation-based verification: Generates and runs GHDL simulation artifacts to validate that RTL behavior matches quantized Python expectations.

Use case: You have a trained PyTorch classifier and need a deterministic, FPGA-optimized inference pipeline with verified fixed-point behavior.

Quick Start

Use the 324-pytorch-to-vhdl skill to convert your PyTorch model into synthesizable VHDL using Q8.8 quantization and generate a matching GHDL testbench for cycle-accurate verification.

Frequently Asked Questions about 324-pytorch-to-vhdl

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I convert PyTorch models to VHDL for FPGA inference?▼

To convert PyTorch models to VHDL for FPGA inference, use this skill to map neural network layers and weights into synthesizable RTL. It targets embedded AI deployment by constructing deterministic forward-pass logic without manual rewriting.

What is fixed-point quantization for FPGA neural networks?▼

Fixed-point quantization for FPGA neural networks converts floating-point PyTorch weights into hardware-friendly integer formats like Q8.8 or Q1.15. This ensures bit-accurate inference and enforces numeric_std conventions for synthesizable VHDL.

How do I verify VHDL RTL against PyTorch simulation outputs?▼

To verify VHDL RTL against PyTorch simulation outputs, generate GHDL testbenches to run cycle-accurate simulations. This confirms bit-accurate results by comparing RTL forward-pass behavior against quantized Python expectations.

Can I map common PyTorch layers like nn.Linear to VHDL directly?▼

Yes, you can map common PyTorch layers like nn.Linear and nn.ReLU to VHDL directly. The skill uses a layer rules knowledge base to orchestrate deterministic layer mapping into VHDL-friendly structures such as MAC arrays and comparators.

Does this approach support GHDL simulation for bit-width correctness?▼

Yes, this approach supports GHDL simulation to enforce bit-width correctness and numeric_std conventions. It generates simulation artifacts that validate the RTL behavior, ensuring the hardware forward pass matches the quantized model.

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