Analyze RTL architecture against microarchitecture spec and coding conventions.
npx skills add https://github.com/babyworm/rtl-agent-team --skill arch-review-babyworm
Please help me install this Agent Skill. Skill: arch-review Source: https://github.com/babyworm/rtl-agent-team/tree/main/skills/arch-review Command: npx skills add https://github.com/babyworm/rtl-agent-team --skill arch-review-babyworm
Architecture review detects structural mismatches between the RTL implementation and the microarchitecture spec, assesses timing feasibility, and evaluates code quality, while ensuring outputs are produced without any modification to RTL code.
Run the three read-only agents to generate architecture review findings and store results in reviews/phase-2-architecture/architecture-review.md.
High-intent search queries and answers about installing and using this skill.
Perform a read-only RTL architecture review by running three parallel agents to evaluate structure, timing, and maintainability against the microarchitecture spec without modifying any RTL code, generating a consolidated architecture-review.md.
RTL architecture sign-off enforces coding conventions including i_/o_/io_ port prefixes, domain_clk clock naming, domain_rst_n reset naming, logic data types, u_ instance prefixes, and gen_ generate prefixes to ensure structural consistency.
Run a pre-tape-out architecture review after completing RTL implementation and before tape-out gates to detect structural mismatches with the microarchitecture spec, assess timing feasibility, and evaluate code quality.
The three-reviewer parallel approach uses rtl-architect, timing-advisor, and rtl-critic agents running simultaneously to independently evaluate RTL structure, timing feasibility, and code quality, aggregating findings into a single review document.
RTL architecture review generates a consolidated architecture-review.md file stored in reviews/phase-2-architecture/, featuring a Feature Coverage Checklist and a prepared standard review Markdown format for sign-off validation.
Validate microarchitecture spec consistency without modifying RTL code by running read-only architecture reviews that analyze structural mismatches, timing feasibility, and code quality, producing a consolidated review document for sign-off.
babywormRefine ambiguous hardware specifications into validated requirements with acceptance criteria.
alo-expApply atomic fixes with DCO sign-off and verify via tests and re-review.
chuanseng-ngAutomate multi-corner timing analysis and sign-off for chip designs.
amoslee2026Review RTL MAS designs for defects, timing risk, and alignment.
