Reads chip verification coverage databases from UCIS XML, Synopsys VDB, Cadence UCD, Siemens formats.
npx skills add https://github.com/Paradicat/demo --skill cov-reader
Please help me install this Agent Skill. Skill: cov-reader Source: https://github.com/Paradicat/demo/tree/main/agent_pack/skills/cov-reader Command: npx skills add https://github.com/Paradicat/demo --skill cov-reader
This Skill streamlines the analysis of complex chip verification coverage databases, helping engineers identify and address verification gaps efficiently.
Use the cov-reader skill to open the coverage database located at '/path/to/coverage.xml' and then display the overall summary.
High-intent search queries and answers about installing and using this skill.
To analyze chip verification coverage across vendor formats, use a unified reader that ingests UCIS XML, Synopsys VDB, Cadence UCD, and Siemens UCDB, normalizing them into a single YAML format for consistent querying of line, toggle, branch, and FSM coverage metrics.
Yes, you can identify coverage holes in specific hierarchy scopes of a VDB database by querying targeted scopes and analyzing uncovered bins or signals, helping pinpoint exact verification gaps and root causes within your design modules.
The best way to manage verification coverage waivers for untestable items is through a unified YAML format that systematically excludes known untestable items, ensuring coverage reports accurately reflect genuine verification gaps without manual filtering.
Yes, this coverage analysis approach supports detailed insights into both covergroup and assertion coverage types, alongside line, toggle, branch, condition, FSM, and expression coverage, providing a comprehensive view of chip verification completeness.
To navigate design hierarchy and query specific coverage scopes in a UCDB file, utilize a coverage reader that supports hierarchical navigation, allowing you to drill down into modules and extract targeted coverage summaries for detailed analysis.
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