cuda-interop

Map ovrtx render output to CUDA memory or CUDA arrays with timeline semaphores.

201|25|Updated Dec 18, 2025
One-click install
npx skills add https://github.com/NVIDIA-Omniverse/ovrtx --skill cuda-interop
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: cuda-interop
Source: https://github.com/NVIDIA-Omniverse/ovrtx/tree/main/.agents/skills/cuda-interop
Command: npx skills add https://github.com/NVIDIA-Omniverse/ovrtx --skill cuda-interop

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

Enable GPU-side interop by mapping ovrtx render output to CUDA memory or CUDA arrays for zero-copy or efficient access, and ensure correct synchronization with CUDA consumers.

Core Features & Use Cases

  • CUDA interop patterns for rendering pipelines involving CUDA arrays, timeline semaphores, and Vulkan shared memory.
  • Guidance on mapping render outputs to CUDA memory or CUDA arrays, managing synchronization, and coordinating with Vulkan occupancy/shared memory patterns.
  • Use Case: Integrate ovrtx-rendered output into a CUDA-based post-processing or visualization pipeline.

Quick Start

Configure your pipeline to map ovrtx render output to CUDA memory and coordinate synchronization with your CUDA consumer.

Frequently Asked Questions about cuda-interop

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I map render output to CUDA memory for zero-copy access?

Map render output to CUDA memory by configuring your pipeline to map outputs directly to CUDA memory or CUDA arrays, enabling zero-copy access for efficient CUDA consumers.

What are timeline semaphores used for in CUDA and Vulkan interop?

Timeline semaphores in CUDA and Vulkan interop enforce correct device mapping and synchronization semantics, applying explicit wait and signal patterns for coordinated shared memory access.

Can I integrate CUDA compute with a Vulkan rendering pipeline?

Yes, you can integrate CUDA compute with a Vulkan rendering pipeline by coordinating synchronization through shared memory and timeline semaphores across Python and C/C++ implementations.

How do I synchronize CUDA consumers with external rendering pipelines?

Synchronize CUDA consumers with external rendering pipelines by applying explicit wait and signal patterns using timeline semaphores, ensuring correct synchronization semantics and shared memory access.

Do I need specific synchronization patterns for USD-based rendering paths using CUDA?

Yes, USD-based rendering paths integrating CUDA require explicit wait and signal patterns using timeline semaphores to enforce correct device mapping and synchronized access across Python and C/C++ implementations.