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cuda-kernel-techniques

Identify CUDA kernel optimization techniques by profiler symptoms and hardware context.

3|Updated May 14, 2026
Search Tags:#bottleneck analysis#memory access#regression debugging#cuda optimization#kernel performance#nc u profiling#occupancy tuning
One-click install
npx skills add https://github.com/Romaosir/IF_Romao_kernel_optimize --skill cuda-kernel-techniques
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: cuda-kernel-techniques
Source: https://github.com/Romaosir/IF_Romao_kernel_optimize/tree/main/skills/b200_skill/cuda-kernel-techniques
Command: npx skills add https://github.com/Romaosir/IF_Romao_kernel_optimize --skill cuda-kernel-techniques

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve?

This Skill helps you quickly choose the correct CUDA kernel optimization technique by bottleneck and context, reducing wasted experiments and regression churn.

Core Features & Use Cases

  • Bottleneck-Driven Technique Lookup: Quickly route to the right sub-topic (memory access, data placement, parallelism, compute, control flow, occupancy, numerical stability, and anti-patterns) based on profiler symptoms (e.g., DRAM stalls, scoreboard stalls, occupancy limits).
  • Hardware-Context Guidance (B200/SM100 + older SMs): Provides hardware notes and thresholds where behavior differs, so you can adapt techniques correctly for Blackwell B200 (SM100) and compare against SM80/SM90 expectations.
  • Regression-Safe Debugging: Use the catalog’s dedicated anti-patterns and “when it hurts” sections to avoid known dead-ends when a change regresses.

Quick Start

Use the cuda-kernel-techniques skill to identify the best optimization technique for my kernel when NCU shows DRAM > 70% with long scoreboard stalls, and explain when cp.async and TMA help or hurt on SM100.

Frequently Asked Questions about cuda-kernel-techniques

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I choose the right CUDA kernel optimization technique based on NCU profiler symptoms?▼

To choose a CUDA kernel optimization technique, route by deterministic profiler symptoms such as DRAM stalls, scoreboard stalls, or occupancy limits, matching them to specific memory access, compute, or parallelism restructuring strategies.

What is the best way to fix CUDA occupancy limits and long scoreboard stalls?▼

Fixing CUDA occupancy limits and long scoreboard stalls involves applying occupancy tuning and data-path redesign techniques, using provided when-it-helps and when-it-hurts guardrails to avoid regressions.

Do CUDA memory access tuning and cp.async techniques work differently on B200 SM100 compared to older architectures?▼

CUDA memory access tuning and cp.async techniques behave differently on B200 SM100 compared to older SMs, requiring specific hardware notes and thresholds to adapt data placement and parallelism correctly.

Can I get code sketches for shared register data-path redesign and parallelism restructuring in CUDA?▼

Yes, you can get code sketches for shared register data-path redesign and parallelism restructuring, providing cross-references to operator-specific evidence to validate the implementation.

When should I not use specific CUDA compute instruction selections for numerical stability?▼

You should avoid specific CUDA compute instruction selections for numerical stability when the catalog’s anti-patterns and when-it-hurts sections indicate known dead-ends for your hardware context.

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