Verify PCB pad-to-net assignments against datasheet pin specifications.
npx skills add https://github.com/pjcau/esp32-emu-turbo --skill datasheet-verify
Please help me install this Agent Skill. Skill: datasheet-verify Source: https://github.com/pjcau/esp32-emu-turbo/tree/main/.claude/skills/datasheet-verify Command: npx skills add https://github.com/pjcau/esp32-emu-turbo --skill datasheet-verify
Mismatched PCB pad‑to‑net assignments can cause hardware failures, such as unconnected power pins or incorrect signal routing, especially after design changes or component additions.
hardware/datasheet_specs.py).board.py, routing.py, or before JLCPCB production.Ask the skill to verify all PCB nets against the datasheet specifications.
High-intent search queries and answers about installing and using this skill.
You can verify PCB net assignments by running a Python script that automatically compares your board's pad-to-net connections against manufacturer datasheet pin specifications to report PASS, FAIL, WARN, or INFO codes.
PCB net verification works by comparing your updated board design against a single source of truth datasheet specs file, validating pad types and drill sizes for SMD and THT components to prevent hardware failures from incorrect signal routing.
Yes, you can validate pad types and drill sizes for both SMD and THT components by running the datasheet verification script, which checks these physical attributes alongside net assignments against your defined hardware specifications.
Yes, you need a hardware/datasheet_specs.py spec file and scripts/verify_datasheet_nets.py script to check PCB nets, as these files serve as the source of truth for comparing pad-to-net assignments and validating component physical attributes.
You should run datasheet net verification after schematic changes, GPIO remapping, component additions, or pre-release checks before JLCPCB production to ensure pad-to-net assignments conform to manufacturer datasheet pin specifications and prevent hardware failures.
The best way to prevent unconnected power pins or incorrect signal routing is automated net comparison against datasheet specifications, which catches mismatched PCB pad-to-net assignments after design changes or component additions before hardware production.
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