dse-loop

Automating microarchitectural parameter tuning within a time budget is achieved by running an autonomous design space exploration loop that iterates through parameter selection, execution, and analysis until the objective is met or the timeout occurs.

Autonomous design space exploration for computer architecture is an automated process that runs a program, analyzes the results, selects the next parameters, and repeats until an objective is met or a timeout occurs. It optimizes parameters for tasks like microarchitectural knob tuning and synthesis optimization without manual intervention.

Yes, you can use design space exploration for compiler flag optimization across toolchains. The automated loop applies to compiler flag exploration, running programs, analyzing results, and selecting the next flags within a bounded time budget until the objective is met or timeout occurs.

To set up RTL parameter sweeps with configurable iteration limits, configure the MAX_ITERATIONS and PATIENCE parameters in the exploration loop. The loop will run, analyze results, and select next parameters until the limits or the TIMEOUT budget are reached.

To extract objective metrics from synthesis optimization runs, use the provided parse_result.py script. This script parses the iteration logs recorded in dse_results to extract the objective metric from each run for analysis and recovery.

Yes, the design space exploration loop supports workflow logging for recovery. It records iterations, results, and decisions throughout the parameter tuning process, and logs results to dse_results for auditing and recovery.