dsp-algorithm

Develop, port, and verify DSP algorithms for ADSP-21569 SHARC+ DSPs.

Updated Jun 8, 2026
One-click install
npx skills add https://github.com/Qiuu2/algo --skill dsp-algorithm
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: dsp-algorithm
Source: https://github.com/Qiuu2/algo/tree/main/.claude/skills/dsp-algorithm
Command: npx skills add https://github.com/Qiuu2/algo --skill dsp-algorithm

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

This Skill eliminates the manual, error-prone work of designing, porting, and verifying DSP algorithms for ADSP-21569 SHARC+ DSPs used in directional column speakers, handling complex tasks like beamforming design, fixed-point conversion, and hardware accelerator integration that require deep domain expertise and strict compliance with project governance rules.

Core Features & Use Cases

  • Beamforming Algorithm Design: Supports delay-sum (DSB), MVDR, GSC, subband MVDR, and Dolph-Chebyshev beamformer design with detailed implementation specifications and algorithm selection decision matrices.
  • Fixed-Point Porting & Verification: Provides end-to-end Q format selection, overflow analysis, and bit-exact verification workflows to ensure floating-point algorithms are correctly ported to fixed-point SHARC+ targets with acceptable SNR loss.
  • Hardware Integration & Performance Optimization: Covers FIRA hardware accelerator integration, SHARC compute budget (MIPS/MCPS) analysis, and latency optimization to meet real-time audio processing constraints for directional speaker systems.
  • Use Case: An audio engineer developing a new directional column speaker can use this Skill to design a subband MVDR beamformer, port it to Q15 fixed-point format, verify bit-exact match with the floating-point reference, and optimize FIRA usage to stay within the ADSP-21569's MIPS and latency budgets.

Quick Start

Use the dsp-algorithm skill to design a Dolph-Chebyshev beamformer for an 8-element 100mm-spaced linear array, port it to Q15 fixed-point for the ADSP-21569 SHARC+, and generate a bit-exact verification report against the MATLAB floating-point reference.

Frequently Asked Questions about dsp-algorithm

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I design a beamforming algorithm for a directional column speaker array?

Beamforming algorithm design for directional column speakers involves selecting methods like delay-sum, MVDR, subband MVDR, or Dolph-Chebyshev based on array geometry and constraints. This Skill provides decision matrices and implementation specifications for SHARC+ DSP targets.

How do I port a floating-point DSP algorithm to fixed-point on a SHARC+ DSP?

Porting floating-point DSP algorithms to fixed-point on SHARC+ requires Q format selection, overflow analysis, and bit-exact verification workflows. This process ensures algorithms are correctly converted with acceptable SNR loss for the target hardware.

How do I verify bit-exact fixed-point DSP code against a MATLAB floating-point reference?

Bit-exact verification of fixed-point DSP code against a floating-point MATLAB reference uses R14 closure workflows. This Skill enables generating verification reports that confirm the fixed-point implementation matches the reference within acceptable SNR loss margins.

What are the limitations of using fixed-point Q format conversion for audio beamforming on ADSP-21569?

Fixed-point Q format conversion for audio beamforming on ADSP-21569 introduces SNR loss and potential overflow risks during arithmetic operations. Careful Q format selection and overflow analysis are required to maintain algorithm performance within the SHARC+ compute budget.

Does the dsp-algorithm skill support generating CCES compatible code for SHARC+ targets?

Yes, the dsp-algorithm skill supports generating ASCII-only CCES compatible code for SHARC+ targets. It ensures compliance with CLAUDE.md governance rules and utilizes change-block based code updates for the ADSP-21569 DSP.