dv-spec-parse

Name: dv-spec-parse
Availability: InStock
Author: rajivhasija79-bit

Parse hardware design specifications into structured DV spec JSON and summaries.

3|4|Updated Mar 21, 2026

Search Tags:#json-output #hardware-design #spec-parsing #design-verification #dv-workflow #documentation-extraction #markdown-summary

Ready to run

npx skills add https://github.com/rajivhasija79-bit/DV-Skills --skill dv-spec-parse

💬 Prompt for ChatGPT / Claude Chat▼

Please help me install this Agent Skill.
Skill: dv-spec-parse
Source: https://github.com/rajivhasija79-bit/DV-Skills/tree/main/skills/dv-spec-parse
Command: npx skills add https://github.com/rajivhasija79-bit/DV-Skills --skill dv-spec-parse

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

Automated extraction of hardware design verification information from specs into structured DV data, reducing manual parsing time and ensuring consistency across DV artifacts.

Core Features & Use Cases

Parse design specifications (PDF, DOCX, TXT, or Markdown) to extract features, interfaces, signals, parameters, clocks, resets, operating modes, and compliance standards.
Produce a machine-readable DV spec data JSON and a human-readable dv_spec_summary for downstream DV tools.
Flag gaps and generate NEEDS_REVIEW notes when essential details (like register maps or CDC details) are missing.

Quick Start

Provide the path to a design specification file and a project name, and I will generate the structured DV spec outputs.

Frequently Asked Questions about dv-spec-parse

High-intent search queries and answers about installing and using this skill.

FAQPage Schema

How do I extract design verification data from a hardware specification PDF?▼

Extracting design verification data from a hardware specification PDF involves parsing the document to pull out features, interfaces, and signals into a structured DV spec JSON. This automated extraction reduces manual parsing time and flags missing details like register maps for review.

What is a DV spec JSON and how is it generated from design specs?▼

A DV spec JSON is a machine-readable file containing extracted hardware verification parameters, clocks, resets, and operating modes. It is generated by parsing design specification documents and structuring the extracted information for use by downstream DV tooling.

Can I parse Markdown and DOCX files to extract hardware interfaces and signals?▼

Yes, you can parse Markdown, DOCX, TXT, and PDF files to extract hardware interfaces, signals, and compliance standards. The process yields a structured JSON file and a human-readable markdown summary for your verification workflow.

How do I identify missing CDC details and register maps during spec parsing?▼

Identifying missing CDC details and register maps during spec parsing is handled by flagging gaps and generating NEEDS_REVIEW notes. This ensures essential missing information in the design specification is highlighted for manual verification.

What is the best way to automate hardware design verification documentation extraction?▼

The best way to automate hardware design verification documentation extraction is using a spec parser that processes input files and outputs a structured DV spec JSON. This ensures consistency across DV artifacts and significantly reduces manual parsing time.

Does spec parsing work for extracting operating modes and compliance standards?▼

Yes, spec parsing works for extracting operating modes and compliance standards from hardware design specifications. It processes the document to capture these specific verification parameters and structures them into a machine-readable output format.