dv-spec-parse
CommunityTurn hardware specs into structured DV data.
Software Engineering#json-output#hardware-design#spec-parsing#design-verification#dv-workflow#documentation-extraction#markdown-summary
Authorrajivhasija79-bit
Version1.0.0
Installs0
System Documentation
What problem does it solve?
Automated extraction of hardware design verification information from specs into structured DV data, reducing manual parsing time and ensuring consistency across DV artifacts.
Core Features & Use Cases
- Parse design specifications (PDF, DOCX, TXT, or Markdown) to extract features, interfaces, signals, parameters, clocks, resets, operating modes, and compliance standards.
- Produce a machine-readable DV spec data JSON and a human-readable dv_spec_summary for downstream DV tools.
- Flag gaps and generate NEEDS_REVIEW notes when essential details (like register maps or CDC details) are missing.
Quick Start
Provide the path to a design specification file and a project name, and I will generate the structured DV spec outputs.
Dependency Matrix
Required Modules
None requiredComponents
Standard package💻 Claude Code Installation
Recommended: Let Claude install automatically. Simply copy and paste the text below to Claude Code.
Please help me install this Skill: Name: dv-spec-parse Download link: https://github.com/rajivhasija79-bit/DV-Skills/archive/main.zip#dv-spec-parse Please download this .zip file, extract it, and install it in the .claude/skills/ directory.
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