What problem does it solve?
Safety-critical embedded systems risk shipping undetected defects when verification rungs of the V-model are skipped without documentation, leading to costly recalls or regulatory non-compliance for automotive, aerospace, and industrial safety applications.
Core Features & Use Cases
- Four-Rung Verification Ladder: Automatically maps each safety-relevant function to the appropriate Model-in-the-Loop, Software-in-the-Loop, Processor-in-the-Loop, or Hardware-in-the-Loop test rung based on active regulatory requirements (ISO 26262, DO-178C, IEC 61508).
- Gap Documentation Enforcement: Treats all missing or skipped rungs as documented assurance gaps with required written rationales, eliminating silent verification oversights.
- Fault Injection Alignment: Derives Hardware-in-the-Loop fault-injection scenarios directly from Failure Modes Effects and Diagnostic Analysis (FMEDA) to cover all dangerous failure modes.
Use Case: For an ASIL-D automotive emergency brake function, this skill ensures MIL tests validate the control model against requirements, SIL tests catch code generation mismatches, PIL tests verify target compiler behavior, and HIL tests exercise real-time timing and fault response on the physical ECU rig.
Quick Start
Use the hil-harness skill to generate a complete verification ladder report for the current embedded safety-critical plan, including per-rung evidence status and all missing gap findings.