What problem does it solve?
Simulink models can contain hidden design errors such as division-by-zero, integer overflow, dead logic, and out-of-bounds array access that are hard to find manually. This Skill runs Simulink Design Verifier's Design Error Detection, performs root cause analysis on every finding, and guides a safe clone-fix-verify workflow.
Core Features & Use Cases
- Automated defect detection: Runs SLDV Design Error Detection via
sldv_run_defect_checker, with automatic caching of prior analysis results.
- Root cause analysis: Uses
sldv_find_de_root_cause to produce backward slices, counterexamples, locality (blast-radius) scores, and shared-root cascade annotations for each finding.
- Dead logic classification: Classifies dead logic as intentional (defensive logic, negation guards) versus design error using a built-in pattern catalog, then proposes ranked fix options.
- Use Case: An engineer suspects unreachable logic in a controller model. The Skill runs DED, traces each defect to its root cause block, classifies findings against known patterns, and proposes fixes that are applied only to a cloned model after explicit user approval.
Quick Start
Ask the agent to run design error detection on your Simulink model and explain the root cause of any findings.
