triton-ascend-case-elemwise-cast

What problem does it solve?

In large-shape elementwise cast from int8 to fp16, performance can be bottlenecked by underutilized compute units and memory bandwidth. This Skill introduces a two-level tiling approach (BLOCK_SIZE + TILE_SIZE) to maximize UB utilization and achieve peak throughput on ATLAS-based Ascend hardware with Triton.

Core Features & Use Cases

• Two-level tiling strategy (BLOCK_SIZE + TILE_SIZE) to improve UB utilization and throughput.
• Supports large shapes (millions of elements) with high parallelism (up to thousands of cores).
• Guidelines to flatten multi-axis data into a single axis for efficient vectorization and better cache usage.
• Suitable for int8 to fp16 elementwise casts and related type-conversion workloads on Ascend backends.

Quick Start

Run the Triton kernel configured with BLOCK_SIZE and TILE_SIZE tiling to perform int8-to-fp16 elementwise casts on large tensors.