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triton-operator-performance-optim

Optimize Triton operator performance on Ascend NPU by addressing UB overflow and tiling strategies.

31|1|Updated Mar 28, 2026
Search Tags:#performance#tiling#triton#ascend#npu#kernel-optimization#ub
One-click install
npx skills add https://github.com/Ascend/agent-skills --skill triton-operator-performance-optim
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: triton-operator-performance-optim
Source: https://github.com/Ascend/agent-skills/tree/main/skills/triton-operator-performance-optim
Command: npx skills add https://github.com/Ascend/agent-skills --skill triton-operator-performance-optim

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes references (resource) components.

What problem does it solve?

Optimizes Triton operator performance on Ascend NPU by addressing UB overflow and optimizing tiling strategies.

Core Features & Use Cases

  • Phase-driven optimization covering algorithm review, bottleneck diagnosis, hardware-specific tuning, and verification for general input shapes.
  • tiling-aware techniques to maximize Cube utilization and minimize UB footprint across kernel blocks.
  • Use Case: For Ascend NPU deployments running Triton operators, apply structured optimization to achieve stable accuracy with improved throughput.

Quick Start

Profile the Triton kernel on Ascend and apply tiling-guided optimizations to maximize Cube utilization.

Frequently Asked Questions about triton-operator-performance-optim

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I optimize Triton operator performance on Ascend NPU?▼

Optimize Triton operators on Ascend NPU by applying phase-driven tiling strategies that maximize Cube utilization, manage the 192KB UB capacity, and use FP32 accumulators to improve kernel throughput.

Why does my Triton kernel encounter UB overflow on Ascend NPU?▼

UB overflow on Ascend NPU occurs when tiling strategies exceed the 192KB UB capacity. You must apply tiling-aware techniques to minimize the UB footprint across kernel blocks while adhering to Cube-unit tiling constraints.

What are the Cube-unit tiling constraints for Triton on Ascend NPU?▼

Cube-unit tiling constraints require using FP32 accumulators, maintaining 16-byte alignment, and sizing kernel blocks to maximize Cube utilization without exceeding the 192KB UB capacity, ensuring numerical accuracy is preserved.

How do I tune GEMM Triton operators for Ascend NPU?▼

Tune GEMM Triton operators by reviewing the algorithm, diagnosing bottlenecks, and applying hardware-specific tiling to maximize Cube utilization for diverse kernel shapes and data layouts while preserving numerical accuracy.

Does optimizing Triton tiling on Ascend NPU affect numerical accuracy?▼

Optimizing Triton tiling on Ascend NPU preserves numerical accuracy by enforcing FP32 accumulator usage and 16-byte alignment while applying tiling-aware techniques to minimize the UB footprint across kernel blocks.

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