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hw-native-sys

Official

@hw-native-sys

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11Public Repos
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48Published Skills

Specialized engineering suite for Ascend NPU kernel development, PTOAS compiler maintenance, and high-performance C++ operator validation.

Skills Distribution
DomainCloud & Comp...Compiler Engineering (35%)NPU Kernel Develop.. (35%)Hardware Performan.. (20%)Version Control & CI (10%)

Agent Skills by hw-native-sys

Showing 48 vetted skills indexed across 4 GitHub repositories.

hw-native-syshw-native-sys
30

ptoas-npu-validation-a5

Build and execute PTOAS A5 kernel validation workflows on NPU or simulator.

Official
Advanced
hw-native-syshw-native-sys
30

ptoas-test-framework-guidance

Place PTOAS tests in lit, VPTO, or TileLang ST frameworks with validation commands.

Official
Intermediate
hw-native-syshw-native-sys
30

build-ptoas-wsl

Build and validate the PTOAS compiler toolchain from source in WSL.

Official
Advanced
hw-native-syshw-native-sys
30

ptoas-project-development

Coordinate PTOAS compiler changes across MLIR ODS, C++, CLI, Python, docs, and tests.

Official
Advanced
hw-native-syshw-native-sys
30

pto-isa-cpu-sim-kernel-test

Validate PTOAS-generated PTO kernels against the local PTO ISA CPU simulator.

Official
Advanced
hw-native-syshw-native-sys
30

generate-vpto-release-doc

Regenerate bundled PTO ISA reference documentation from distributed specification and instruction chapter files.

Official
Advanced
hw-native-syshw-native-sys
30

ptoas-publish-pr

Publish scoped PTOAS changes as a draft GitHub pull request.

Official
Advanced
hw-native-syshw-native-sys
30

debug-matmul-mx

Diagnose MX and cube matmul failures across shapes, layouts, and writeback.

Official
Advanced
hw-native-syshw-native-sys
30

pto-gym-vpto-validation

Validate PTO-Gym cases using the PTOAS VPTO backend with A5 flags.

Official
Intermediate
hw-native-syshw-native-sys
30

camodel-isa-verification

Verify PTO-ISA instruction behavior and output correctness via CA model simulator tests and log analysis.

Official
Advanced
hw-native-syshw-native-sys
30

ptoas-manual-authoring

Writes user-facing PTOAS manuals and ISA specification documents without exposing implementation details.

Official
Advanced
hw-native-syshw-native-sys
30

ptoas-build-and-abs

Rebuilds the PTOAS compiler and compiles the Abs sample to generate VPTO output.

Official
Intermediate
hw-native-syshw-native-sys
30

resolve-dsl-issue

Reproduce and resolve DSL compilation failures from GitHub issues using PTOAS logs.

Official
Advanced
hw-native-syshw-native-sys
30

rewrite-kernel-with-vmi

Rewrite AscendC or CCE kernels into PTODSL implementations preserving ABI and synchronization.

Official
Advanced
hw-native-syshw-native-sys
30

llvm-test-tool-fallback

Locate missing lit or FileCheck tools in LLVM environments.

Official
Basic
hw-native-syshw-native-sys
30

msprof-op-simulator-insight

Profile PTOAS-generated kernels and export simulator data for MindStudio Insight.

Official
Advanced
hw-native-syshw-native-sys
30

ptodsl-tilelib-template-authoring

Author and debug PTODSL TileLib templates while preserving metadata and runtime semantics.

Official
Advanced
hw-native-syshw-native-sys
34

benchmark

Benchmark Ascend hardware runtime performance across host and device timings.

Official
Advanced
hw-native-syshw-native-sys
34

insight-trace

Generate MindStudio Insight traces for kernel_entry kernels via msprof op simulator.

Official
Advanced
hw-native-syshw-native-sys
34

onboard-arch-precheck

Detect host Ascend silicon and block mismatched onboard test invocations.

Official
Advanced
hw-native-syshw-native-sys
34

checkout-pr

Configure git remotes and check out local PR work branches.

Official
Intermediate
hw-native-syshw-native-sys
34

review-pr

Analyze merge-base diffs to verify PR changes align with stated goals.

Official
Intermediate
hw-native-syshw-native-sys
34

multi-repo-setup

Clones or updates external repos into a build directory for CI parity.

Official
Advanced
hw-native-syshw-native-sys
34

clean-branches

Remove local and fork branches merged into main, including squash merges.

Official
Intermediate

Frequently Asked Questions About hw-native-sys

FAQPage Schema
What specific tasks can engineers perform with these capabilities?

Engineers can design, debug, and validate Ascend C kernels, perform NPU architecture mapping, execute PTOAS compiler transformations, and generate ISA reference documentation. The suite supports end-to-end operator development, from tiling strategy design to numerical precision debugging and kernel launch verification.

Which technical personas benefit from this registry?

This registry is designed for NPU firmware engineers, compiler developers, and performance optimization specialists working on Ascend hardware. It provides targeted support for those managing complex C++ operator lifecycles, hardware-specific ISA verification, and large-scale compiler project maintenance.

What are the primary hardware and software prerequisites?

Successful operation requires a configured Ascend NPU environment, the CANN software stack, and a compatible Linux build environment such as WSL. Users must ensure proper installation of the MindStudio Insight simulator and the PTOAS compiler toolchain to enable kernel profiling and ISA simulation.