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rewrite-kernel-with-vmi

Rewrite AscendC or CCE kernels into PTODSL implementations preserving ABI and synchronization.

30|74|Updated Jan 29, 2026
Search Tags:#ascendc#ptoas#ptodsl#vmi#kernel rewrite#npu compilation#mlir validation
One-click install
npx skills add https://github.com/hw-native-sys/PTOAS --skill rewrite-kernel-with-vmi
Or copy as Structured Prompt for Agent▼
Please help me install this Agent Skill.
Skill: rewrite-kernel-with-vmi
Source: https://github.com/hw-native-sys/PTOAS/tree/main/.codex/skills/rewrite-kernel-with-vmi
Command: npx skills add https://github.com/hw-native-sys/PTOAS --skill rewrite-kernel-with-vmi

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill includes scripts (resource) and references (resource) components.

What problem does it solve?

This Skill converts complete AscendC or CCE-style device kernels into equivalent PTODSL implementations while preserving their ABI, data movement, synchronization, and observable computation.

Core Features & Use Cases

  • VMI Compute Translation: Rewrites vector and SIMT arithmetic, comparisons, conversions, reductions, and rearrangements into logical PTO VMI operations.
  • MI Orchestration: Translates memory movement, buffer management, synchronization, control flow, and pipeline coordination into explicit PTODSL micro-instructions.
  • Validation Workflow: Checks generated MLIR with kernel compilation and validates VMI lowering through the PTOAS VPTO backend.
  • Use Case: Convert an AscendC vector kernel with UB transfers, synchronization flags, tail masks, and datatype conversion into a maintainable PTODSL kernel that can be compiled and inspected through PTOAS.

Quick Start

Use the rewrite-kernel-with-vmi skill to convert the provided AscendC kernel into PTODSL, preserve its interface and synchronization behavior, and validate the generated MLIR with the VPTO backend.

Frequently Asked Questions about rewrite-kernel-with-vmi

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I rewrite AscendC kernels into PTODSL while preserving memory movement and synchronization?▼

Rewrite AscendC kernels into PTODSL by translating VMI compute and MI orchestration into logical PTO operations while preserving host ABI, memory movement, and synchronization semantics.

What is the process for validating MLIR generated from AscendC kernel translation?▼

Validate generated MLIR by checking PTODSL kernel compilation and validating VMI lowering through the PTOAS VPTO backend to ensure correct dtypes, layouts, lane counts, masks, and synchronization.

Can I convert CCE-style device kernels with tail masks and datatype conversions into maintainable PTODSL?▼

Yes, converting CCE-style device kernels with tail masks and datatype conversions into maintainable PTODSL is supported by translating vector arithmetic, buffer management, and synchronization into explicit micro-instructions.

Does PTODSL compilation support NPU vector kernels combining VMI compute with control-flow orchestration?▼

PTODSL compilation supports NPU vector kernels combining VMI compute with MI, MTE, buffer, control-flow, and synchronization orchestration by rewriting them into equivalent validated implementations.

What are the limitations when rewriting AscendC kernels with explicit synchronization into PTODSL?▼

Limitations apply to NPU vector kernels only, requiring explicit synchronization, correct dtypes, layouts, lane counts, masks, and offsets to be preserved during PTOAS VPTO lowering for functional equivalence.

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