EDA Netlist Agent Planning

EDA netlist analysis and transformation can be automated using LLM-driven planning. This approach leverages a JSON-based operation catalog to plan and execute complex gate-level Verilog netlist modifications, reducing manual effort and human error.

Netlist transformations supported include buffer insertion, depth optimization, technology remapping, fanout adjustments, rewiring, and cleanup. These operations are executed through a JSON-based catalog driven by LLM planning.

Fanin and fanout analysis of specific signals in Verilog netlists can be performed using dedicated analysis tools. The LLM planner automates this by selecting the appropriate operation from the JSON catalog to inspect the signal cones.

Gate-level netlist depth can be optimized automatically through LLM-driven planning. The system utilizes dedicated transformation tools to rewire logic paths and reduce overall circuit depth without manual scripting.

EDA netlist automation supports structural health analysis and logic equivalence verification. The skill utilizes dedicated tools to check netlist integrity and verify logical equivalence after performing transformations.

LLM-driven EDA netlist transformation relies on predefined JSON operation catalogs and tool dependencies. Complex operations outside the available analysis and transformation tools may require manual intervention or custom scripting.