floorplan-guide
CommunityGenerate PD-ready floorplan guides and diagrams.
Software Engineering#physical design#floorplan#rtl analysis#chip layout#placement constraints#svg diagram
AuthorParadicat
Version1.0.0
Installs0
System Documentation
What problem does it solve?
This Skill automates the creation of detailed floorplan guides and visual layout diagrams, crucial for physical design teams, by analyzing RTL source code.
Core Features & Use Cases
- RTL Analysis: Extracts hierarchy, identifies critical paths, and estimates module areas directly from Verilog/VHDL.
- Deliverable Generation: Produces actionable Markdown guides and SVG diagrams for chip layout planning.
- Use Case: When a user needs to plan the physical implementation of a chip block, this Skill analyzes the RTL to provide engineers with placement constraints, critical path information, and visual layout guidance.
Quick Start
Use the floorplan-guide skill to analyze the provided RTL source code and generate a floorplan guide document and SVG diagram.
Dependency Matrix
Required Modules
None requiredComponents
scriptsreferences
💻 Claude Code Installation
Recommended: Let Claude install automatically. Simply copy and paste the text below to Claude Code.
Please help me install this Skill: Name: floorplan-guide Download link: https://github.com/Paradicat/demo/archive/main.zip#floorplan-guide Please download this .zip file, extract it, and install it in the .claude/skills/ directory.
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