gf-build

Orchestrate parallel SystemVerilog builds with phase-based decomposition and integration.

101|13|Updated Jan 28, 2026
One-click install
npx skills add https://github.com/codejunkie99/Gateflow-Plugin --skill gf-build
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: gf-build
Source: https://github.com/codejunkie99/Gateflow-Plugin/tree/main/plugins/gateflow/skills/gf-build
Command: npx skills add https://github.com/codejunkie99/Gateflow-Plugin --skill gf-build

SYSTEM DOCUMENTATION & REQUIREMENTS

What problem does it solve?

This skill orchestrates parallel SystemVerilog builds by decomposing designs into independent components and coordinating across multiple phases to speed RTL development and minimize integration issues.

Core Features & Use Cases

  • Modular decomposition: break a design into components and spawn parallel build tasks.
  • Phase-driven workflow: decomposition, parallel build, lint, integration, and verification.
  • Use Case: build a RISC-V CPU with ALU, RegFile, Decoder, and Control FSM using concurrent component builds and centralized integration.

Quick Start

Use the gf-build command to initiate a multi-module build, e.g., "/gf-build RISC-V CPU with ALU, regfile, decoder, control FSM".

Frequently Asked Questions about gf-build

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I run parallel SystemVerilog builds for large RTL designs?

Parallel SystemVerilog builds are orchestrated by decomposing RTL designs into independent components and spawning concurrent build tasks across multiple phases. This phase-driven workflow covers decomposition, parallel building, linting, integration, and verification.

What is phase-based decomposition in RTL build orchestration?

Phase-based decomposition in RTL build orchestration is the process of breaking a design into independent components and coordinating across distinct phases: decomposition, parallel build, lint, integration, and verification.

Can I use parallel build orchestration for a modular RISC-V CPU design?

Yes, parallel build orchestration applies to modular RISC-V CPU designs by decomposing the processor into components like ALU, RegFile, Decoder, and Control FSM, then spawning concurrent component builds with centralized integration.

How do I consolidate lint and testbenches during parallel SystemVerilog builds?

You can consolidate lint and testbenches during parallel SystemVerilog builds by applying the workflow's phase-driven rules, which centralize component checks and integration after spawning concurrent build tasks.

What's the best way to minimize integration issues in scalable SystemVerilog workflows?

Minimizing integration issues in scalable SystemVerilog workflows is best achieved by using explicit decomposition rules and parallel task spawning, followed by consolidated linting and final top-level integration.