Summarize Verilator and lint output into readable reports with prioritized fixes.
npx skills add https://github.com/RedClaus/cortex --skill gf-summary-redclaus
Please help me install this Agent Skill. Skill: gf-summary Source: https://github.com/RedClaus/cortex/tree/main/core/plugins/gateflow/skills/gf-summary Command: npx skills add https://github.com/RedClaus/cortex --skill gf-summary-redclaus
This Skill simplifies the process of understanding Verilator and linting tool outputs, which are often dense and difficult to parse, by providing a clear, summarized report.
Summarize the most recent Verilator output.
High-intent search queries and answers about installing and using this skill.
To summarize Verilator lint output, this Skill analyzes the simulation and lint check results, presenting errors and warnings with line numbers, descriptions, and suggested fixes in a readable report format.
Debugging hardware design errors from dense lint results is best achieved by generating a summarized report that prioritizes recommendations for issue resolution, highlighting critical errors and suggesting fixes to save debugging time.
Yes, you can get suggested fixes from Verilator output. The Skill analyzes the lint check results and presents errors and warnings alongside descriptions and prioritized recommendations for resolving the identified issues.
Generating a report with line numbers from lint check results involves parsing the Verilator output to extract error locations and descriptions, which this Skill formats into a human-readable summary for quick reference.
Yes, it summarizes output for complex hardware design simulation files. After running a Verilator lint check, the Skill quickly highlights critical errors and suggests fixes, simplifying dense and difficult-to-parse outputs.
xsw632Analyze failed hardware simulation logs to identify root causes.
xsw632Run Verilator lint-only checks on generated Verilog for hardware modules.
codejunkie99Analyze Verilator lint and simulation outputs into structured reports.
codejunkie99Lint SystemVerilog code with Verilator and produce categorized warnings and errors.
