gluon_authoring

Ports tuned Triton kernels to Gluon on AMD CDNA GPUs with verified layout and pipeline recovery.

178|52|Updated Jul 30, 2025
One-click install
npx skills add https://github.com/AMD-AGI/GEAK --skill gluon-authoring-amd-agi
Or copy as Structured Prompt for Agent
Please help me install this Agent Skill.
Skill: gluon_authoring
Source: https://github.com/AMD-AGI/GEAK/tree/main/perf_knowledge/expert_skills/skills/gluon_authoring
Command: npx skills add https://github.com/AMD-AGI/GEAK --skill gluon-authoring-amd-agi

SYSTEM DOCUMENTATION & REQUIREMENTS

💡 This Skill requires triton, torch, numpy, and includes scripts (resource) and references (resource) components.

What problem does it solve? Migrating a tuned plain-Triton kernel to Gluon on AMD Instinct GPUs (gfx942/gfx950) often loses performance silently: hand-transcribed layouts drift from the compiler's, the software pipeline that Triton's num_stages bought is dropped, and occupancy regressions hide behind passing numerics. This Skill provides the deterministic transcription procedure, executable gates, and measurement tools to port faithfully and recover the lost overlap. ## Core Features & Use Cases - TTGIR-to-Gluon layout recovery: Recover layouts from a pinned kernel's .ttgir using the compiler's own parser with round-trip proofs, rather than hand-written mappings. - Pipeline re-injection: Re-apply Triton's scheduling and pipelining passes to Gluon kernels in-process, restoring cross-iteration overlap without modifying installed files. - Executable validation gates: Champion, parity, occupancy, and A/B benchmark gates that attribute any anchor-to-champion gap to lost pipeline, lost layout, or register allocation. - Use Case: Given a tuned Triton attention kernel on an MI300 GPU, transcribe it to Gluon, verify layout equivalence, measure the transcription debt, and climb past parity using the ranked continuation steps. ## Quick Start Ask the agent to port the tuned Triton kernel in the task directory to Gluon using this skill, running the champion gate first and the parity gate before any optimization climb.

Frequently Asked Questions about gluon_authoring

High-intent search queries and answers about installing and using this skill.

FAQPage Schema
How do I port a Triton kernel to Gluon on AMD GPUs?

Pin the tuned Triton champion at its best config, dump its .ttgir, and recover layouts with ttgir_bridge.py, which uses the compiler's own parser with round-trip proofs. Then verify layout equivalence, measure the transcription debt with parity_gate.py, and re-inject the software pipeline before optimizing further.

Why is my Gluon kernel slower than the original Triton kernel?

A faithful transcription lands below the comparator because gluon_to_ttgir omits Triton's scheduling and pipelining passes, losing cross-iteration overlap. Measure the debt with plain@ns=1, then re-inject the pipeline passes using gluon_swp.py, which wraps the compiler in-process without modifying installed files.

Does Gluon support async copy on gfx942 (CDNA3)?

cdna4.async_copy imports on gfx942 but does not lower there except at the 32-bit per-thread direct-to-LDS width that generation supports. On CDNA3, authored overlap for dot-free loops uses synchronous staging with allocate_shared_memory plus the warp_pipeline_stage hint instead.

When should I use Gluon instead of plain Triton?

Gluon pays only when the performance residual is layout-shaped, because LDS swizzle and padding choice plus LDS deduplication are the two things plain Triton has no syntax for. If the bottleneck is not layout-related, tuning the plain Triton kernel's config is the cheaper direction.

Why do my A/B benchmark results look flat across kernel variants?

Variants differing only by a constexpr layout constant share a Triton cache entry, so the second silently runs the first's binary and all arms tie. Give each arm its own kernel object and TRITON_CACHE_DIR, expose a fingerprint() hook, and run ab_bench.py with --permute to check whether numbers follow the code or the position.