What problem does it solve?
This Skill identifies and applies two advanced optimizations to a Gluon GEMM kernel: XCD-aware PID remapping to improve L2 cache reuse for matrix B and epilogue M-slicing to reduce register pressure and hide store latency, enabling higher MFMA throughput on CDNA GPUs.
Core Features & Use Cases
- Stage 1: XCD-aware PID remapping with grouped swizzle improves L2 hit rates for B reads by distributing PIDs across XCDs and reusing B tiles across M-block groups.
- Stage 2: Epilogue M-slicing reduces VGPR pressure by slicing the final accumulator into smaller live portions, overlapping MFMA with buffer_store to hide latency.
- Use Case: Optimizing a large GEMM kernel on MI300X/MI350 where B tiles are large and L2 bandwidth is a bottleneck.
Quick Start
Run the /gluon-beyond-loop-opt skill to enable XCD remapping and epilogue slicing on your Gluon GEMM kernel and verify correctness against a reference matmul.